It’s been a long while since I have been able to post/write, having a new baby apparently does that (I missed that in the datasheet). Since I have neglected posting, or forgotten, lets continues with ‘The Forgotten Ones”

This brings us to 1971, Fairchild, after losing many employees in 1968-69 who went on to start world famous semiconductor companies (Intel and AMD amongst others) has decided to make their own processor system.  This was very early in the era of CPUs, you had the Intel 4004, the TI TMS1000, and various calculator type circuits.  The PPS-25 is a 400KHz (62.5uS Word cycle time, 2.5uS bitrate) PMOS processor, organized into several different chips.  It is a 4-bit parallel, with 25 digit serial data, thus the name, Programmable Processor System 25.  Each of those 62.5uS cycles is also divided into 25 micro instructions of 2.5uS,  Now what would a 4-bit processor need 25 bit data?  Precision, the PPS-25 was designed to fill the void (at the time) between high end calculator chips and actual mini-computers.

The PPS-25 systems core is the 3805 ALU and the 3806 Function/Timing chips. The 3805 (DIP18) includes the adder/subtractor as well as a 25 bit register (The accumulator).  This accumulator was maskable as well, allowing different parts of it to be operated on with a 6-bit mask.  This allowed a great amount of flexibility in programming. The 3806 chip (the largest of the chipset a DIP24) contains the timing and control logic, two 25-bit status registers, branch logic, the instruction address register, and various other logic functions.   To support this core, is a pair of register chips, the 3808 and 3809 registers.  These are basic shift registers and each contain three 4-bit BCD parallel, 25-digit serial register memories.  Instructions are stored in up to 25 256×12 bit serial ROMs, the 3810.  The address bus is 8-bits, and the instruction word is 12-bits so with 25 chips, you get 6400 instruction words of available instructions (or constants). 95 instructions were provided.

Cybernetic Mathiputer – Vintagecomputer.net

The PPS-25 also supports the 3811 for handling output, as well as the 3807/3803 input devices which support up to a 32 key keyboard (3807) or larger, 3803.  Both these chips came in 40DIP packages, larger then the CPU itself.

This design was a bit complicated, and took several chips, so it did not see wide adoption, Fairchild ‘de-emphasized’ it by 1974 as they were working then on the F8 processor.  The PPS-25 did however find its uses, and inspired other designs as well.  HP considered using the PPS-25 in its calculator designs, before deciding to make their own CPU’s in house (Saturn, Nut etc).  The design and programming of which bare a strong resemblance to the PPS-25.

One of the more known uses of the PPS-25 was in the Cybernetic Mathiputer, an early learning toy for children but its use was not limited to such trivial devices.  It was also used where precise math work was needed. a Walsh Spectrum Analyser design chose it above the what would normally be considered much more powerful Intel 8080 largely due to its math capabilities.

3805 ALU – 4-bit

Its turns out making a CPU function more like an advanced calculator allowed it to do advanced math fairly well.  It was also chosen for calculating SINC/COSC values for an engineering system.

Piper Cheyenne II

Another field where precise math is needed is in navigation, and the PPS-25 found a home here as well. King Radio Corp (now Honeywell) designed a Radio Navigation computer for airplanes in the 1970s based on the PPS-25.  Around 500 of these were made and were found in such planes as the Piper PA-31T Cheyenne, Cessna 441 Conquest II, and Beech King Air, high end twin turbo props of the era.  Interestingly King had difficulties sourcing replacements for these, so a common upgrade to these nav computers was replacing the PPS-25 with a custom ASIC and a Motorola 6802 CPU.

In 1974 National Semiconductor introduced what is arguably the first 16-bit microprocessor (it had a 8-bit mode as well which was more efficient but could run 16-bits as well).  This chip was made on a PMOS process and ran at 1.3MHz.  In some ways it was ahead of its time, there wasn’t a ton of demand for a 16-bit processor at the time and interfacing to its PMOS architecture was…tricky.

The PACE used -12V, +8V as well as +5V.  It also required a high power 2 phase clock (the clock drove the internal logic).  National was to use Signetics and Rockwell as second sources but neither ended up making chips.  (this was a 2 way agreement, as National was to second source the 2650 for Signetics and the PPS-4/PPS-8 for Rockwell. The PACE had a 10 level 16-bit stack and 4 16-bit general purpose registers.  It supported 46 instructions.

National Semi. IPC-16A-500D PACE 1977

The PACE found a very few design wins, mostly used in custom applications where its speed and 16-bit were useful.  It was designed into a custom control system for a concrete batch plant, and later (in 1980) used by CERN in Switzerland to control a touch terminal used for particle accelerator experiments (specifically controlling the Modal terminal for the Super Proton Synchrotron).  In this application its speed and its 16-bit capabilities were useful for the math functions needed.  CERN eventually replaced it with the much easier to work with Motorola MC68000 (which had Euro sources available).  A similar use was found by the Australians Dept of Defense to control a graphics terminal also used for physics experiments.

CERN Nodal Touch Terminal – Powered by PACE

In 1977 National converted the design to NMOS, which simplified its interfacing and increased the speed to 2MHz.  This was the INS8900 which required -8VDC, 12V, and 5V but most importantly a normal single phase clock.  The INS8900 also fixed a few bugs, some sources claim the INS8900 also added a NOP instruction, but this  existed officially in the PACE as well (Opcode 5C00). In addition SFLG/PFLG 0000 can be used as a NOP on either processor.

The INS8900 was used in a very early multi-processor system designed by BRATO (British Rail Automatic Train Operation). This system was an early investigation of automating train/track control, and used three INS8900 CPUs to provide enough speed and redundancy to run the 3 programs deemed needed ( automatic driver, tachometer and safety supervisor). Each processor each program (so all 3 processors eventually run all 3 programs) and then the results are compared.  The INS8900 was chosen over the TMS9900 because it utilized the bus much less (the TMS9900 user registers use external RAM, whereas the INS8900 has 4 general purpose internal registers), resulting in less chances of bus interference between the 3 processors.  THe INS8900D was also used in some Sun (not the Sun Microsystems) Motor Testers, used in automotive repair sops in the early 1980’s.

INS8900D – 1979 – Early Production – Large black die cap

INS 8900D – 1985 – Late Production – Small Gold Die cap

These processors are a bit obscure, and as far as I can tell were not used in a ton of products.  They do come up from time to time though, and The CPU Shack now has a test board design available for them.

The board was a challenge to build due to the PACE and the INS8900 having such different voltages and clocks, requiring separate Power Supply Panels to run each.  These are now available for pre-order (we’re not thinking to generally stock these quite yet).

Price is $159 and includes free shipping worldwide. Pre order now and I should be able to ship in around 6 weeks.

If there is enough interest I will of course try to keep 1-2 in stock for that time you find a nice white/gold IPC-16 PACE CPU.

About a year ago Mats Danielson from Stockholm Sweden contacted the CPU Shack about an interesting project, documenting the history of Philips Data Systems, a former powerhouse of European computing. Previously we wrote about the SPC16 micro used in some of these, but Mats has done a complete history.

His book is available for free at Research Gate:  The Rise and Fall of Philips Data Systems. It includes the SPC16 as well as the history of much of Swedish computing.  We’re always happy to help out researchers, be it with data, or just pictures.

In 1966, American engineer and inventor Robert Dennard invented dynamic RAM cells – single-transistor cells, each bit of information is stored in the form of an electric charge of a capacitor. By that time, MOS technology was already capable of creating capacitors. The presence or absence of a charge on a capacitor represents one or zero bits of information. And the transistor can control the recording of the charge into the capacitor. At the time, Dennard was working on a six-transistor memory cell, so he could only devote his spare time to his new idea. After figuring out the intricacies of writing charge into a capacitor using a transistor and then reading it back through the same transistor, Dennard and IBM applied for a patent for single-transistor dynamic random-access memory.

Robert Dennard and his Single-Transistor Memory Cell

However, the first commercially available dynamic memory chip, the 1103, released by Intel in October 1970, used three transistors per cell and separate lines to write and read data. A single-transistor circuit requires a sophisticated signal amplifier to read the data. It was impossible to implement such an amplifier on a chip with the technology available at that time. At the end of 1971, the 1103 became the best-selling semiconductor chip in the world. By 1972, 14 of the 18 mainframe manufacturers in the U.S., Europe, and Japan were using semiconductor memory instead of magnetic core memory. The first commercially available computer, the HP9800, was designed using the Intel 1103.

The first truly mass-produced dynamic memory chip in the USSR was the 565RU1, a random-access RAM with a capacity of 4096 bits and a 4096 X 1 organization. It is believed that the prototype for the 565RU1 was the 2107A chip released by Intel at the turn of 1973-74.  There is some similarities in layout to the 2107A, but it certainly is not a direct copy.

The chip is comparable in technical characteristics to analogues TMS4060 from Texas Instruments and MM5280 from National Semiconductor. Therefore, the question of which of the chips was chosen for copying remains open. The Soviet chip, like its Western counterparts, had a three-transistor memory cell.

Intel 2107A (bad die shot, but you can see decoder circuitry on the left, and memory cells (3 transistor per cell) on the right)

Intel 2104 (2107B w/ multiplexed inputs – single transistor cells (image courtesy of EvilMonkeyz)

Mostek MK4096 – The standard 4k Multiplexed single cell DRAM – Computer History Museum

It was in this circuitry that it was produced for many years, although the same 2107A was replaced within a year after the start of production by the 2107B chip, which already had a single-transistor memory cell.

565RU1 die manufactured in 1981.

565RU1 die manufactured in 1985. Nearly identical with a chip released four years earlier.

Read More »

UAE Mars Hope Mission – IR Imager powered by LEON3FT

In the 1990s the ESA began a project to develop their own, open source, easily usable processor for space applications.  Before this the ESA had used mainly MIL-STD-1750A processors, both American made ones, or direct copies their of, such as the Dynex MAS281, a clone of the McDonnel Douglas MDC281.  The ESA explored many different architectures, including the Motorola MC88K RISC process, the MIPS RISC processor, and AMD 29K RISC processor the SPARC, and somewhat oddly, even the National Semiconductor NS32k series processors (which at the time were fairly powerful and used a fair amount in embedded apps).  The SPARC came out of this as the winner.

Cypress CY7C601 SPARC Processor. The basis for the ERC32

At the time the SPARC was a pretty widely used processor, and was being developed by multiple companies.  It was defined as an architecture, and various companies could implement it how they saw fit, in various technologies.  This is very much how the 1750A architecture was made to be as well.  Considering this, the only two really viable architectures that wouldn’t (at that time) have been a sole source item, were the MIPS and the SPARC, both were used and made by many companies, but SPARC it was.

Atmel TSC695 – ERC32 Single Chip SPARC V7 – Still in production

The first implementation was the ERC32 released in 1995, a early SPARC V7 3-chip implementation typically made on a  0.8u process.  These were decent, but took 3 chips, were limited to 20MHz due to memory interface limitations, and were not particularly scalable.  The ERC32 did fly to space, and was used on the ISS as one of the main control computers, as well as 10 other missions including the ESAs ATV resupply vehicles for the ISS.  By 1998 the ERC32 was shrunk to 0.6u allowing it to be integrated onto a single chip (the Atmel TSC695).  This became the standard ESA processor as well as being used by other nations, including China, Israel, India and even NASA.

By the year 2000 the SPARC V7 architecture was rather long in the tooth, having been originally designed back in the 1980’s.  The decision was made to upgrade to SPARC V8.  SPARC V8 added integer multiply/divide instructions, as well as expanded the floating point from 80-bit to 128-bit.  SPARC V8 became the basis for the IEEE 1754-1994 standard for what a 32-bit processor must do.  This was important as it made a very clear definition for software as well, ESA wanted a processor whose support was very well known, and very well defined.  The SPARC V8 implementation became the LEON (for Lion) processor.  These used a 5-stage pipeline (Fetch, Decode, Execute, Memory, Write) and were made on a 0.35u process delivering around 50MIPS at 0.5W. It used around 100,000 gates on a 30mm2 die and was a fully Fault Tolerant design (unlike the ERC32).  It was rated to handle 300Krad of ionizing radiation without upset.

Atmel AT697 LEON2

LEON2 was a fairly similar deign, it moved the MUL/DIV instructions into hardware (instead of emulating them on LEON1) and reduced the feature size down to 0.18u.  It also added many on chip peripherals, such as a PC133 SDRAM controller (with Error detection/Correction) as well as a AMBA bus.  It took around 0.6W at 100MIPS though some implementation saw speeds of up to 120MIPS at 0.3W).  LEON2 saw use on many missions, including the camera controller for the Venus Express mission and the BepiColombo mission to Mercury. LEON2 was designed as a single function processor, but in the real world was often being used as a SoC (System on a Chip).

This led to the development of the LEON3 in 2004.  It was originally made on a slightly LARGER process of 0.20u.  It ran at around 150MIPS at 0.4W.  Its biggest upgrades were moving from a 5-stage pipeline to a 7–stage pipeline (Fetch, Decode, Register Access, Execute, Memory, Exception, Write) as well as supporting multiprocessing.  In realization of the actual use cases the LEON processors were seeing (as SoCs rather then as single processors) the LEON3 added a large array of peripherals.  This included Spacewire, MIL-STD-1553  interfaces, DDR RAM controllers, USB controllers, 1G Ethernet MAC, and much more.  All stuff that originally had to be added on to previous systems was now on chip.

Cobham UT700 Fault Tolerant SPARC V8 LEON3FT

The entire design was good for 400MHz on a 0.13u process and used around 25,000 gates.  Like the LEONs before it, the LEON3 was designed as a synthesizable device.  You could implement the entire core in your on ASIC or FPGA, or buy an FPGA off the shelf already programmed as one (Aeroflex offers this option). You could also buy ready made processors implementing it, much like any other CPU.  Cobham (now known as CAES Cobham Advanced Electronic Solutions) offers the UT700.  The UT700 is a 166MHz processor implementing the full LEON3FT design.  The ‘FT’ stands for Fault Tolerant, and adds a lot of error checking and correcting features on top of the base LEON3 design.  Every bit of RAM on chip, from registers, to cache has error detection and correction.  The UT700 includes 16K of Instruction and Data cache on chip as well as all the usual memory controllers and communication interfaces of the LEON3.  It runs at 1.2-1.8V and and max performance dissipates 4W.

The LEON3FT powers the European Galileo navigation satellites, and many others, including the French Spot-6 Earth Observation craft.  They also power each of the Iridium-NEXT communications satellites that began launching in 2017

This is the beginning (hopefully) of a series of articles dedicated to dead brands – computer hardware manufacturing companies, which at one time enjoyed overwhelming success, but disappeared for one reason or another (some could not stand the competition, some were mired in corruption, some simply could not rebuild their own business). This first article will look at the story of the smashing success and unpredictable collapse of the Taiwanese MoBo manufacturer Soltek Computer Inc., one of the leading motherboard manufacturers in the early 2000s.  (EDITOR: I Can’t wait for Abit – all hail the BP6)

When you are a monopolist in the market of goods or services, then you are not afraid of any competition. But what if young, ambitious players, trying to surpass you, offer the market something that is not inferior in quality, but at the same time allows the consumer to save money? In such competitive conditions, you can either recapture positions, choosing innovative paths, or leave the pedestal. We saw similar races in the global IT market at the beginning of the twentieth century. Along with predatory companies in the unpredictable ocean of computer hardware, myriads of small manufacturers of computers and components multiply and multiply. And if someone does not manage to grow from a small fry into an adult fish, then this is a very common phenomenon. It is impossible to say that only fierce competition is the main cause of loss of profitability or absolute bankruptcy. The history of market relations knows many examples of how, due to negligent management, venerable brands burst like soap bubbles. There were cases when professional marketing was not enough to promote an innovative engineering idea. Often, the reasons for the collapse of brands were global economic and technical realities.

MoBo manufacturers specializing in the manufacture of motherboards, after the standardization of Intel microprocessors, popped up around the world like mushrooms after rain. In the mid-90s of the twentieth century, a personal computer still remained an individual assembly electronic device, and everyone could choose their own set of hardware, based on the needs for the functionality of the PC system. In the same period, it became absolutely clear that the IT technology market is an unplowed field. Go ahead, plant your own “seeds” and earn fast-growing profits. Thus, a relatively constant circle of microchip manufacturers gradually formed, which, with enviable regularity, introduced new products to the electronics market. By this time, the technology of surface mounting of printed circuit boards (the so-called SMT technology) was established, implemented using pick-and-place class robotic mechanisms. It has become the driving force behind the multilayer printed circuit board industry. Another important point in the rapid development of the IT market was the cultivation of young engineering personnel who offered not only innovative developments, but also the rapid implementation of competitive products. It goes without saying that the appearance in 1996 of a Taiwanese manufacturer – Soltek – did not make such a splash.

The new player boldly rushed into battle: the company’s production facilities were based on the use of the latest SMT equipment, and the staff consisted of the most talented personnel in the field of computer engineering. The head office of the company was located in Taiwan’s His-Chih Industrial District (Xizhi District). The area is known for being the headquarters of brands such as Acer and DFI. The company’s first assembly line was also located in the area. After two years of trademark paperwork and invention patents, the U.S. Patent and Trademark Office has registered the Soltek™ brand with ownership of Soltek Computer Inc. A trademark slogan was also registered: Soltek – The Soul Of Computer Technology. Main activities: computer technologies, software systems and products of research activities in the field of IT. But this is only a general nomenclature, while the detailed list of Soltek products was quite wide, from PC motherboards to keyboards and mice.

SL-54U5 Super 7 Board

The products of the first production strategy are low-budget MoBo solutions based on VIA chip technologies, adapted for Intel and AMD processors. Consumer interest was captivated not only by the price of Soltek motherboards, but also by an extended set of interface capabilities of peripheral equipment, as well as a well-chosen set of utilities supplied in the kit.

Read More »

Iskra EMZ100E

Back in 1975 the Faculty of Electrical Engineering of the University of Ljubljana (now the Capital of Slovenia, but back then, a city in Yugoslavia) began work with Iskra and AMI to develop an indigenously produced processor.  Iskra (which means ‘Spark’ in Slovenian) began in 1946 and by this time was the largest electronics/telecom company in Yugoslavia.  If it had electrons flowing through it, Iskra likely had something to do with it.  AMI was an American Semiconductor company best known at the time as a contract fab and second source for many other companies.  At the time they were a pretty large 2nd source for Motorola, making 6800 processors and peripherals.

The goal was to co-develop a basic control oriented processor, something that could run basic machines and industrial automation type stuff, toaster oven, games, etc.  It wasn’t meant to be a general purpose computer type processor cranking out spreadsheet formula results.  In many cases the design was to fill the same role as the National Semiconductor COPS400 line.  Iskra hoped to eventually manufacture the processors in Yugoslovia with technology and equipment from AMI, but Yugoslavia and the United States were in a bit of a weird spot in the 1970’s so getting export licenses for fab equipment never happened.  Yugoslavia was rather independent of the Soviet Union (due to the Stalin-Tito rift) which afforded them access to the US that other communist countries of the time didn’t have, but they were still nominally communist.  One has to wonder how hard AMI tried to get such licenses though.

The processor they developed was called the S2000 in the West, and in Yugoslavia, the Iskra EMZ1001.  These processors were made on an AMI NMOS process (most likely 6 micron) with 1200 transistors.  AMI would fab the wafers and ship them to Iskra for final test/assembly.

The EMZ1001/S2000 has been called both a 4-bit and an 8-bit processor. This is because it interfaces to the outside world with an 8-bit databus (and a 13-bit address bus) but has a 4-bit ALU at its core.  Internally it has both a 4-bit bus and an 8-bit bus, and can perform 8-bit arithmetic, just 4-bits at a time.  This of course results in a performance hit, but with a 4.5microsecond cycle time (225KHz) it wasn’t meant to be a high speed chip.  It includes logic on chip to handle timers, and second counting (even a EUR instruction to switch the time base from the 60Hz US standard, to the 50Hz Euro standard) as well as interfaces for buttons, and Capacitive Touch plates and LEDs (S2000) or Vacuum Fluorescent Drivers (S2000A).  It was designed to run on a single 9V supply, making it viable to use off of a 9V battery.

AMI S2000 Dev System (the S6800 Devsystem could also be used )

The S2000/EMZ1001 instruction set contains 51 instructions. all of which are single byte.  49 of these are single cycle instructions.  The processor contains a stack making subroutines and interrupts (on the 2200/2400) easy to handle.  1kx8 of onboard ROM is included (up to 8K total can be addressed) as well as 256 bits of RAM (16x4x4) (which can be used for registers, as well as addresses memory).

Several subversions of the processor were made with different features and some added instructions to handle ADC functions.  The S2200/2400 add an 8-bit ADC and more RAM and ROM (and have 8 additional instructions).

There was a CMOS version as well, the S2210, for lower power applications.

AMI Logo – There was several die revisions that AMI made.

As Iskra was receiving wafers from AMI and was testing them inhouse, they were able to make several temperature ratings.

EMZ1001B 0-55C
EMZ1001C 0-70C
EMZ1001E 0-85C
EMZ1001KCP -40-85C (Industrial/Military Applications)

By the time Iskra was able to begin testing/packaging these, it was 1977-78, and the design was a bit underwhelming for the market. Still it found fairly wide use in Yugoslavia.  The Western equivalents though, are almost never seen making the Iskra version perhaps more common, and widely used.

Looking for an upgrade for your Atari or Amiga? The CPU Shack now has..CPU’s for sales. Tested working, genuine full featured (FPU + MMU ) XC68060RC50A Rev 5 CPUs.

Tested using a Blizzard PPC accelerator board at 50MHz clock. A few CPUs were checked using TF1260 board @66MHz, worked well, but I won’t guarantee they all like 66MHz (though with cooling they should hit that and likely more) All CPUs were checked by booting into DiagROM, checking CPU Revision there and then booting to AmigaOS 3.1.4 (Caches/FPU enabled).

These are $289 with FREE Worldwide shipping.

Head over to the 68060 Sale Page for more details and to purchase them

Dov Frohman

In 1971 Intel came out with the first memory that could be not only programmed by the user, but could be erased with UV light and programmed again. This was the 1701 EPROM (quickly revised into the 1702 EPROM and 1702A). It was 2048 bits (256×8), used PMOS, and required three voltage (+5V, +12V and -12V) to operate, and each data line required a strobed -48V pulse for programming.

The 1701 was introduced to the world in the May 10, 1971 issue of Electronics Magazine in an article written by Dov Frohman, the inventor of the EPROM.  Today Intel is more known for, and remembered by their microprocessors, but until the early 1980’s it was EPROM’s that carried the company.  They accounted for the largest share of profits at Intel for over a decade.

K505RR1

Soviet K505RR1 – 1978

Intel 1701 – Unmarked

The first EPROM chip produced in the Soviet Union was the K505RR1, developed by the Kyiv Research Institute of Microdevices and manufactured by the Kvazar factory in Kyiv, Ukraine. The chip is a 2048-bit (256×8) electrically programmable read-only memory with ultraviolet erasure. It is an analogue of the 1702А.
They supported up to 20 (they wore out quite quickly)  overwrite cycles and had a data retention period in on state of not less 5000 hours. This is one of the only EPROM chips manufactured in the flat pack package. NEC made a 2Mbit flat pack EPROM in the 1990s, quite a strange beast.

K573RF1

Analogue of the i2708. The microcircuit is a read-only memory device with a capacity of 8 Kbit (1024х8). Supply voltages of  12v, 5v, -5v. Data Retention period in on state is not less 15000 hours. Number of write cycles at least 100. (a nice improvement over the previous generation)

Microcircuits were manufactured at two factories: Novosibirsk Factory Vostok and Novosibirsk Electrovakuum Factory (NEVZ). The ‘3’ logo is an export version.

NEVZ – 1984

NEVZ military grade version(without letter K + rhombus) -1986

Vostok – 1982

Export – 1986

Export – 1987

On microcircuits with a metal cover, you can see that a part of the conductor connecting this cover and GND pin has been mechanically removed. In electrochemical coating, it’s necessary that all surfaces on which gold is deposited in this case be connected to each other.  But the K573RF1 chip has three power supplies. And minus 5 volts is applied to the die substrate. Part of the conductor has been removed to avoid a possible short circuit.

It’s clearly seen that the die of K573RF1 is divided into two memory blocks.

In the manufacture of dies, it happens that several memory cells turn out to be damaged. The manufacturer blocks access to damaged part of the die by connecting one or two input addresses to ground or a power supply. Either guarantees the operation of only half of the data bus of the microcircuit. K573RF11, K573RF12 have an information capacity of 4 Kbit (512×8) ,  K573RF13, K573RF14- 4 Kbit (1024×4).

Read More »

Saturn-V

The launch by the Soviet Union of the first artificial satellite of the Earth and the first man into space was a real shock for the United States, raising the question in the eyes of the whole world whether the United States is really the leader of world technological progress. Moreover, not only American elites, but also ordinary citizens felt deeply wounded. A month and a half after Gagarin’s flight, US President John F. Kennedy announced the launch of an ambitious lunar space program. On September 12, 1961, Kennedy addressed the nation, calling for a manned mission to the Moon at any cost.

This is actually the first and main reason for the Americans’ success – their lunar mission program became a single “national impulse,” for which no effort or money was spared. At the same time, the Soviet Union accepted the challenge posed by the Americans rather “out of inertia,” as a response to their lunar program. Moreover, by that time the USSR had proved what it wanted, and there was no urgent need to be the first on the Moon anymore. Initially, the Moon landing was not part of the Soviet space program. In the late ’60s and early ’70s it was planned to build a large orbital station and a spacecraft for an expedition to Mars and Venus. Officially, the Soviet lunar program did not begin until 1964.

The key point of the lunar mission program was the development of a super-heavy launch vehicle capable of accelerating a craft weighing several tens of tons to the second cosmic velocity (aka escape velocity). In the U.S. NASA began to create a family of rockets known as Saturn. Although unofficially, NASA began to think about the Moon in 1960, even before Kennedy’s speech, and were working on various options for heavy launchers. The name “Saturn V” hints that the launch vehicle was the fifth model in the family. There were other options, even heavier than Saturn V, with some being planned for a Mars mission as well.

The question was who would build it. The chief architect of the Saturn V, Werner von Braun, chose the division of labor. This allowed him to choose the best of the best in the whole industry. He was able to use the most experienced people from each of the companies. For contractors, the decision meant big orders, not a huge order for any one. In the end, the main share was distributed among three companies: Boeing, North American Aviation and Douglas. All in all, more than 20,000 contractors and subcontractors were involved in the production of the rocket.

The first launch of the three-stage Saturn V rocket took place on November 9, 1967 and showed its amazing capabilities. The 3rd stage with the Apollo unmanned spacecraft and the lunar module mass-dimension model with a total mass of 126 tons entered orbit. And thanks to the sixth launch, humanity took a “giant step” toward the first landing of astronauts on the Moon. On July 21, 1969, astronauts Neil Armstrong and Edwin Aldrin made their first ever landfall on the surface of a natural Earth satellite. The Saturn V rocket still amazes today with its grandiosity. With a launch weight of 3,000 tons, it has a height of 110 meters, making it the tallest rocket in the history of world astronautics.

N1 Business end

What about the USSR? In the Soviet Union, work on N1- a superheavy launch vehicle, began back in 1958. As noted above, it was originally created not to provide flights to the Moon, but to build an orbital station, as well as to launch interplanetary expeditionary spacecraft modules into orbit. Later, however, a belated decision was made to include the USSR in the “lunar race” with the delivery of a man to the surface of the Moon. Thus, the N1 rocket program was accelerated. Before determining the final scheme of the launch vehicle, the creators had to evaluate at least 60 different options. They decided on a scheme with spherical tanks for fuel and oxidizer, as well as a load-bearing outer shell, which was supported by a power set and circular placement of the rocket engines in each of the stages.  The First stage alone had 30 engines, which is a plumbing nightmare (as SpaceX is working out with their Starship launch system)

The stages of the N1 rocket were connected to each other by special transition trusses. The rocket complex, which included the launch vehicle H1 and the lunar system to send to the lunar surface with the subsequent return to Earth of a crew of two (the moon landing involved one person) was designated as N1-L3.

The N1 was never static fired, this led to issues being discovered at launch that would have been easier to catch without destruction if it had been

Getting ahead of myself, I will say that none of the launches of the N1 heavy launcher were successful.

Onboard computer “Argon-11S”.

While the designers were trying to correct the mistakes made in the design of the N1 rocket, the technique of flights to the Moon with a return to Earth after a ballistic flight around the natural satellite of the Earth was being worked out. There have been launches of the Zond spacecraft series using the Proton launch vehicle. These spacecraft were an unmanned version of the two-seater manned spacecraft. All work was carried out in conditions of high secrecy. But now we can say for sure that the Zond-6 and Zond-7 spacecraft were controlled by an onboard digital computer. The Argon-11S.

It consisted of three functionally autonomous computing devices with independent inputs and outputs, interconnected by channels for information exchange and synchronization.

Fixed-point representation. Data bus -14 bit, commands – 17 bit. Number of commands – 15.
Execution time of operations (µs): addition – 30, multiplication – 160.
RAM capacity was 128 14-bit words, ROM capacity – 4096 17-bit words.
Weight 34 kg

Element base: integrated hybrid microcircuits “Tropa-1”. The microcircuits of small integration degree are made on thick films and form a system of logic elements with direct links (OR, OR – NOT, AND – NOT, etc.). Microcircuits are made in the square metal-polymer case of size 11,6 x 11,6×4 mm, weight of microcircuits is not more than 1,5 g.

These were very similar to IBM’s SLT architecture for the System/360 mainframes in the USA at that time period as well.

Historically, these were the first integrated circuits developed in the Soviet Union. The active elements were shell-less transistors. The first prototypes of the series were named 1MD1-1MD6, 1MM1-1MM3. Hundreds of logic circuits were mounted on printed circuit boards and bundled together like a book.

Structurally, Argon-11S consisted of three identical functional blocks operating in parallel and independently of each other. The inputs of each block received exactly the same information from many telemetry sensors. On its basis, each block produced more than forty control actions. For the first time in the practice of creating onboard computers, a node redundancy scheme was applied. The final control actions were formed according to the majority principle. That is, if they were the same on two of the three outputs and different on the third, the values generated by the majority were taken as the basis. In fact, Argon- 11S was constantly voting for the most correct control action.

Various IBM System/360 cards showing similar technology at the Soviet Tropa series.

Zond-6 was the ninth launch of a prototype spacecraft. The purpose of the mission was an unmanned flight and photography of the Moon, the return of the lander to Earth with a landing in a given area, as well as practicing the functioning of the manned spacecraft in automatic version. Unfortunately, due to malfunction of the parachute ejection equipment, the vehicle crashed. After the failure of the Zond-6 return to Earth, Zond-7 was launched to the Moon on August 8, 1969. The day after the launch, the spacecraft maneuvered on an intermediate trajectory and obtained color photographs of the Earth. On August 11, the spacecraft flew around the Moon at an altitude of 1,985 km and conducted two sessions of photographs of the Moon and Earth. Zond-7 returned to Earth on August 14.

After a normal dive into the atmosphere, it landed successfully. The photograph taken by Zond-7 is less well-known than the Blue Marble taken by the crew of the Apollo 17 spacecraft, but it is no less beautiful.

This photo ended up on the mail block dedicated to the flights of these spacecraft.

It must be said that not everything was smooth with Zond-7. Prior to this success, there were three high-profile failures. Three rockets (two of them N1 and one Proton) with similar spacecraft exploded on the launch pads.

Despite the fact that none of the N1 rockets managed to complete the launch program, the designers continued to work on it. The next, fifth launch was scheduled for August 1974, but did not take place. In May 1974, the Soviet lunar program was closed, and all work on the N1 ceased. Two rockets ready for launch were destroyed.

Antares 100 series flew 3 times with NK-33 engines, the 4th flight was unsuccessful and resulted in a large explosion.

Only 150 engines of the NK-33 (the successor of the original NK-15 for the first N1s)  type manufactured for various stages of the rocket were saved from the N1. These engines had a chance to fly already in America. They were used in the first stage of the Antares 100 series launch vehicle of the Orbital Sciences Corporation (Now Northrup via Orbital ATK).  They also continue to be used on the Russian Soyuz-2.1v rocket, with the latest launch in April of 2022, still using engines built in the 1960’s, albeit with more modern electronics.

Soyuz-2.1v

Having lost the “Moon Race”, the Soviet Union concentrated its efforts on other projects that had a less prestigious, but no less important role in space exploration – orbital stations, as well as a fairly successful science campaign exploring Venus.  Hopefully in the next few years we will be able to see another truly massive rocket, with 33 engines on the first stage, launch, heading to the Moon, Mars, and beyond