Archive for the 'CPU of the Day' Category

September 27th, 2014 ~ by admin

National Semiconductor: The COP before the COPS

National Semiconductor MM5782N - 400KHz 1976

National Semiconductor MM5782N – 400KHz 1976

In August we detailed the COP2404 and the COP400 line of 4-bit microcomputers by National Semiconductor.  This NMOS design originated in 1977 and was made for over 30 years.  It, however, was not the the first COP line of National Semiconductor.  In fact the COP400 family was referred to as the COPS II for a brief period in the 1970′s.  If the COP400 was the second in line then what was the ORIGINAL COP microcomputer?

That would be the COPS I of course, better known as the MM5781/2 and its derivatives, the MM5799, MM57140 and MM57152.  These microcomputers were released in 1976 and were made on a volume PMOS process.  They were designed to be inexpensive and simple to use.  The design of the 5781/2 actually started with the MM5734 which was a single chip accumulating calculator chip.  The differences are not as big as one may think.  A multi-function calculator with memory needs an ALU, registers, ann accumulator and instruction decoding, as well as very limited memory and fairly extensive I/O (to run the display and read inputs from the keyboard).  National saw this as an opportunity to capture a bit of the low-end market.  They already had the IMP-16 for their high end, the SC/MP for the mid range, as well as second sourced Intel MCS-4 and MCS-80.  What they lacked was something to compete with the likes of the WD1872 and the TI TMS1000 series as well as the rise of the Japanese 4-bit solutions from NEC, Toshiba and Sanyo.

The 5781/2 was a 2 chip solution, together they formed a microcomputer.  The 5781 contained the program ROM (2048 x 8 bits), as well as the program counter and some control logic.  The 5782 was contained the full ALU, the accumulator, the instruction decoder, and 160×4 bits of RAM.  It could execute 33 different instructions.  Clock speed was 70-400KHz and was provided by an off-chip oscillator.

National Semiconductor MM5799 - Single chip COPs

National Semiconductor MM5799 – Single chip COPs

National combined the 5781/2 into a single 28 pin chip called the MM5799.  It contained all the logic of the 5781/2 but with a smaller amount of RAM (96 x 4 bits) and ROM (1500 x 8 bits). Clock speed remained the same but the instruction set was expanded slightly to 41 instructions.  Two other versions were also made that had more extensive I/O.  The MM57140 which had build in LED drivers, and the MM57152 which was the same, but had built in fluorescent display drivers (this was the 1970′s after all). The ’140 and ’152 had 36 instructions 55 x 4 bits of RAM and 630 x 8 bits of ROM. Maximum clock speed was also reduced to 280KHz.

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August 30th, 2014 ~ by admin

Improve Technologies Make-it 486 – 286 Upgrade

Cx486SLC/e-33MP Based Improve Technologies Make-It 386 for a 286

Cx486SLC/e-33MP Based Improve Technologies Make-It 386 for a 286

Improve Technologies (IT) was a company that existed from 1991-1997.  They were one of the many (to include Cyrix, Evergreen, PNY, Gainbery, etc) that made processors for upgrading 286, 386 and 486 computers.  Processor upgrades are no longer commonplace, becoming nearly non-existent (except for such things as 771 to 775 adapters).  Today computer hardware has become so inexpensive that upgrading more often just consists of purchasing a whole new computer, or at least new motherboard, RAM, and CPU, all at a price of a few hundred dollars.

In the early to mid-90;s however, a computer system cost 2-$3000, so replacing it every few years was not financially viable for many people.  Thus processor upgrades, they were designed to replace a CPU with the next generation CPU (with some limitations) at a price of a few hundred dollars.

In 1976 TranEra was founded in Utah. TransEra is an engineering solutions company, they are built on seeing a technological problem, and engineering a solution, whatever that may be.  They began by making add-on for Tektronix test gear and HP-IB interface equipment.  In 1988 they released HTBasic, a BASIC programming language (based on HP’s Rocky Mountain BASIC) for PC’s.  This is what TransEra became perhaps best known for, as they continue to develop and sell HTBasic.  It was TransEra who developed the Improve Technologies line of upgrades.  They saw a problem, and engineered a solution.

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August 25th, 2014 ~ by admin

National Semiconductor COP2404 – Dual Core Processor from 1982

National Semiconductor COP2404N - Dual core processor

National Semiconductor COP2404N – Dual core processor

National Semiconductor introduced the COPS series of 4-bit processors in 1977.  COPS came from National’s calculator line of chips, and for a short time were known as Calculator Oriented Processors, however this was rapidly changed to Control Oriented Processor System (COPS).  These 4-bit microcontrollers, as their name suggests, were for controlling various consumer devices.  They were used in all sorts of devices from game consoles, to dishwashers.  In the early 1980s National began producing them in CMOS versions, and in 1988 they extended the line to 8-bit (the COP8 family).

COP2404 Block Diagram - 2 Cores with shared memory. - Click to enlarge

COP2404 Block Diagram – 2 Cores with shared memory. – Click to enlarge

In 1981 the COP2404 (and 2440) were announced, with availability beginning in 1982.  The COP2404 was on the top end of the COPS line, it was found that some real time control operations were better served by 2 microcontrollers, so why not design 2 into one.  The 2404 is a dual core processor, with two complete COPS404 cores on one die, sharing I/O and RAM. (The 2440 also included ROM).  True to multi-core form, the memory was shared, meaning the processors could work independently or pass data to each other, including task handoffs if the programmer so desired.  This wasn’t implemented in hardware, but it wasn’t forbidden either, meaning a programmer could do some pretty complicated task management with the dual CPU cores.

The 2404 was packed in a 48 pin PDIP, and was designed as a development device for use with external program memory (EPROM typically).  Production devices were the 2440 (40 pin) 2441 (28 pin) and 2442 (24 pin) which all had 2K of ROM on die.  All included 160×4 bits of RAM and had an instruction cycle of 4usec (using a 4MHz clock, as each instruction took 16 cycles).  They were manufactured on a 3-micron NMOS process (originally, likely shrunk over time).

As technology progressed it became easier to handle multiple real time tasks with a single, faster controller, with good hardware interrupt handling, but for a time, their was a dual-core processor.  The COPS series continued to be sold by National until 2011, when they were bought by Texas Instruments.  While no longer actively marketed, several members of the COP8 line are still being sold.

August 15th, 2014 ~ by admin

Four-Phase Systems AL1 Processor – 8-bits by Lee Boysel

Four-Phase Systems AL-4 - 1000+ gates 8-bits

Four-Phase Systems AL-4 – 1000+ gates 8-bits

In today’s tech economy there are companies that serve as incubators for startups, such institutions as Y-Combinator and Techstars entire purpose is to help develop emergent tech companies.  In the 1960′s there was also tech incubators, perhaps the best known is Fairchild.  The difference is that Fairchild was not designed to be an incubator, nor were they trying to be.  The bureaucracy of such a large corporation allowed many engineers in somewhat marginal positions to work extensiely on projects of their own. Projects that perhaps were not directly beneficial to Fairchild, but close enough related to slip under managements noses.  Many of the ‘great’ semiconductor companies were started by former Fairchild employees, Robert Noyce, co-founder of Intel, being perhaps the most famous.

Lee Boysel started work at Fairchild in 1966 after working at several other companies semiconductor departments.  Boysel had one main focus, MOS.  MOS (Metal-Oxide-Semiconductors) were very new in the 1960′s and their potential was not well understood.  Most IC’s were designed using Bipolar technology but Boysel saw the potential of MOS and worked at Fairchild to perfect its processes.  He designed a 256-bit RAM in MOS< as well as an 8-bit full adder, as well as the first MOS IC with over 100 gates.  None of these designs were of great commercial success, but that was Fairchild’s problem, not Boysel’s. Boysel was building the foundations for his greater plans, plans that would be realized only after leaving Fairchild.

Boysel left Fairchild in 1968, to build a new company known as Four-Phase Systems.  Four-Phase was named after the 4-phase clocking system used in the MOS logic Boysel had designed.  Boysel’s goal was to build a single chip computer using MOS and use it to power systems to rival the likes of Data General and IBM.  Initial funding of $2 million was provided, somewhat ironically, by Corning Glass works, who also owned a large portion of Signetics.  Initial production of Boysel’s designs was by yet another Fairchild incubated startup known as Cartesian inc.  Cartesian was offered foundry services that duplicated Fairchild;s MOS process.  This saved Four-Phase from having to build there designs for a completely new process.

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August 10th, 2014 ~ by admin

An Interesting Fujitsu MCM Pentium Module

Fujitsu MRN-3545 (100) 100MHz Pentium with no L2 Cache

Fujitsu MRN-3545 (100)
100MHz Pentium with no L2 Cache

We have seen Fujitsu MCM Pentiums before.  120MHz, 133MHz 150MHz and MMX ones.  One is pictured in the article on the MicroModule Systems Gemini here.  The 100MHz module is similar, though it is missing the L2 cache tag RAM (256 kbit chip on the top of the package) as well as the 2 cache RAM chips normally installed on the backside of the module.  It would appear that Fujitsu offered these modules with the cache being optional.  There was a 133MHz version (MRN-3548) with cache, and one (MRN-3549) without cache.

These processors were typically used in environmentally challenging environments.  Panasonic famously used them in their ToughBook CF25, the beginning of a line of highly durable laptop in 1996.  Some of these applications were sealed environments, they did not have vents, or active cooling.  This obviously  makes cooling a challenge.  Removing the L2 cache, while causing a significant hit in performance, would alleviate some of the heat generation.

We consider L2 cache to be essential, but many applications do not require it.  Intel infamously removed the L2 Cache completely from the first Celeron processors and while they worked, they were not particularly competitive performance wise.  When competing against wind, rain dirt, and droppage? L2 cache may not be so important

July 10th, 2014 ~ by admin

CPU of the Day: NEC 78C11 Sample and the 78K family

NEC uPD78C11 ES for Mask ROM

NEC uPD78C11 ES for Mask ROM

Most microcontrollers store the program they run in ROM, most of the time this ROM takes the form of a Mask ROM.  This means that its set at the factory when the die is being made, one layer (or more) of the die contains the ROM and the program is hardcoded into the device.  Development versions almost always exist that allow programs to be developed before the mass produced Mask ROM chip, but still the mask must be tested.

This is such an example from NEC.  It is a engineering sample of a uPD78C11 made in 1988.  the 78C11 (and many others in the 78k family) used a 64 pin QUIP (Quad Inline Package),  The 2 rows of staggered pins allowed for a 64 pin DIP in a much smaller foot print.  The only problem was these chips are extremely delicate.  They were designed to be soldered in and never removed.  The standard package was plastic, but for the sake of testing, these are ceramic (its a bid easier to place/bond the dies on small batches on a ceramic package)

The NEC 78k family was and continues to be very popular.  Its current version (the RL78) is made by Renesas, which was formed when Mitsubishi, Hitachi, and NEC joined their semiconductor businesses.  78K processors powered everything from word processors to washing machines and sewing machines.  Now they are also commonly found in automotive applications.

NEC uPD7811G - 1988

NEC uPD7811G – 1988

Like many modern microcontroller families the NEC 78k traces its lineage back to the 1970′s.  The family first appeared in 1980 as the uPD7801.  The 7801 was a microcomputer based on the NEC 780 which was NEC’s version of the Zilog Z80.  The 781x series released in 1982 expanded on the architecture by including an ADC, as well as a full 16-bit ALU (versus the 8-bit from the 780 and 780x) that even supported 16-bit multiply and divide.  The 16-bit ALU made it a simple task for NEC to again extend the architecture to a 16-bit version.  The instruction set was similar, though the naming was different then the Z80.  In 1985 NEC moved the 78k line to a CMOS process, reducing power requirements and increasing the max clock from 12 to 15MHz.

The inclusion of many peripherals made the 78k a popular choice for many embedded applications.  Its continued availability, and wide code base have allowed it to continue to thrive.  And once again, a ‘modern’ MCU is based on a design from the 1970′s.  Processor architectures rarely die, they just continue morphing.

June 12th, 2014 ~ by admin

Early Unfinished Ceramic DIP Package

Package 22 CDIP inFrameMost all IC manufacturers do not make their own packaging.  Raw packages are purchased form package suppliers such as Kyocera and NGK (among many others).  The die is installed, bonded, wired, and tested, and then shipped.  This is an early unfinished 22 pin white ceramic DIP.  This is typical construction from the 1960′s and 1970′s.  The package is supplied as a flat, with the leads straight out and unbent.  All the leads are connected by the ‘lead frame’.  The lead frame keeps the leads straight during die placement and handling.  Only once the die is installed, and the bonding wires connected are the leads (soon to be pins) cut free from the lead frame.   The bottom of the die cavity is connected to the ground pin, and the die is affixed to the package with a conductive resin.  Typically one of the pads on the top of the die will also be connected to the same ground pin.

After the die is affixed and wired, the device is tested and the leads are bent to form a standard DIP package.  In some cases the leads are left unbent and the package becomes a type of surface mount package.  A cap is soldered (or s0metimes brazed) over the die cavity, markings applied and then the device is ready to ship.

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May 26th, 2014 ~ by admin

Memorial Day Chip: Motorola 6800/BQCJC 8-Bits of Military spec

Motorola 6800/BQCJC - Mil-spec 6800 from 1985

Motorola 6800/BQCJC – Mil-spec 6800 from 1985

The Motorola MC6800 was Motorola’s first full 8-bit processor.  Introduced in 1974 it was a very good processor, and at the time it did not have a lot of competition, mainly the Intel 8080 and 8008.  Within 2 years though it was competing against the 6502. the 1802, the Z80 and a host of other processors.

This particular example was made in 1985 and is a MIL-STD-883 rated device for use in high reliability military applications.

But the 1980s 8-bit designs were surpassed by 16 and 32-bit designs for most computer use, leaving the 8-bit MC6800 to largely be relegated to use in embedded application and microcontroller work.   Motorola made several version of the 6800 specifically for use as MCUs, the 6802, the widely used 6805 (and its CMOS version the 68HC05) and the 68HC08.  All of which are still in use today, 40 years after Motorola made the first 6800.  The 6800 (and its derivatives also continue to be used as IP cores, read for dropping into ASIC/FPGA designs.  Just this year Digital Core Designs added the 68HC08 to their library of available IP cores.

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May 14th, 2014 ~ by admin

Mystery Intel Engineering Sample

Here is a very unusual Engineering Sample from Intel.  These were manufactured in 1996 with a 1994 copyright date.  They are slightly smaller then a Socket 5 Pentium and are a  325 pin SPGA package.

Intel KJ8TSMR00-BA - Engineering Sample

Intel KJ8TSMR00-BA – Engineering Sample

Marked KJ8TSMR00-BA the best guess so far is a early P6 (Pentium Pro) core, without the L2 cache.  If you have any ideas, feel free to post in the comments.

April 29th, 2014 ~ by admin

CPU of the Day: Xionics XipChip1

Xionics XipChip1

Xionics XipChip1

It was the late 90s and high integration was the name of the game. Xionics (based in Burlington, Mass) and IBM set out to create an intelligent peripheral controller meant to replace logic/ASICs in printers, copiers, and other imaging products with something more useful.  Xionics was originally founded in 1978 in the U.K.  and in the 1980s began making document imaging products.

The XipChip1 is what they came up with. It is a PowerPC 401 core, running at 40MHz with 2KB I Cache + 1KB D Cache made on a 0.36u 4-Layer CMOS process at IBMs plant in Bromont Canada. They included a JPEG engine, DMA controller, Raster Graphics Engine, and a 240MHz RAMBUS controller (hey it was the 90s, RAMBUS was all the rage).  Xionics sold their technology to a number of printer companies (Ricoh, Panasonic, Xerox, HP and many others) and their software was widely adopted. By 1999 Xionics was bought out by Oak Technology which was acquired by Zoran in 2003.

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