October 20th, 2016 ~ by admin

Processors to Emulate Processors: The Palladium II

Cadence Palladium II Processor MCM 1536 cores - 128MB GDDR - Manufactured by IBM

Cadence Palladium II Processor MCM 1536 cores – 128MB GDDR – Manufactured by IBM

Several years ago we posted an unusual MCM that’s purpose was a mystery.  It was clearly made by IBM and clearly high end.  While researching another mystery IBM MCM both of their identities came to light.  The original MCM is an emulation processor from a Cadence Palladium Emulator/Accelerator system.

In the 1990’s IBM had been working on technology to make emulating hardware/software designs more efficient as such designs got more complicated.  At the time it was most common to emulate a system in an FPGA for testing, but as designs grew more complex this became a slower and slower process.  IBM developed the idea of an emulation processor.  This was to be known as CoBALT (Concurrent Broadcast Array Logic Technology).  It was licensed to a company called QuickTurn in 1996.  At its heart the QuickTurn CoBALT was a massively parallel array of boolean logic processors.  Boolean processors are similar to a normal processor

Here is a flipped (and very rough) die from a Palladium II. You can make out the very repeating design of the 768 boolean processors.

Here is a flipped (and very rough) die from a Palladium II. You can make out the very repeating design of the 768 boolean processors.

but only handle boolean data, logic functions such as AND, OR, XOR, etc.  Perhaps the most well known, is the boolean sub-processor that Intel built into the 8051, it excelled at bit manipulation.  The same applies for the emulation processors in CoBALT.  Each boolean processor has at its heart a LUT (Look Up Table), with 8-bits to encode the logic function (resulting in 256 possible logic function outputs) and the 3 gate inputs serving as an index into the LUT, as well as the associated control logic, networking logic, etc.

A target design is compiled and emulated by the CoBALT system.  The compiling is the tricky part, the entire design is broken down into 3-input logic gates, allowing the emulator to emulate any design.  Each processor element can handle one logic function, or act as a memory cell (as many designs obviously include memory).  The CoBALT had 65 processors per chip, and 65 chips per board, with a system supporting up to 8 boards.  This 33,280 processor system could compile 2 Million gates/Hour.  The CoBALT plus sped this up a bit and supported 16 boards, doubling capacity and added on board memory.

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October 16th, 2016 ~ by admin

Signetics 2650: An IBM on a Chip

Signetics 2650I - Original Version from May of 1976

Signetics 2650I – Original Version from May of 1976

The Signetics 2650 processor has always been described as ‘very mini-computer like’ and for good reason, it truly is very minicomputer like in design.  It is an 8-bit processor released in July of 1975 made on an NMOS process.  The 2650 has a 15-bit address bus (the upper bit (16) is reserved for specifying indirect addressing) allowing addressing of up to 32K of memory.  It has 7 registers, R0, which is used as an accumulator, as well as 2 banks of 3 8-bit registers accessed.  The 2650 supports 8 different addressing modes, including direct, and indirect with autoincrement/decrement.  Its clearly a mini-computer design and there is a reason for that, it was based on one.

The 2650 is very closely based on the IBM 1130 mini-computer released in 1965.  Both use 15-bit addressing, many addressing modes, and a set of 3 registers (Signetics added support for 2 banks of 3,  The Signetics 2650 is often noted for its novel use of a 16-bit PSW status register, but this too is from the 1130, which used a 16-bit Device Status Register for talking with various I/O components.  So why would Signetics base a processor released in 1975 on a 1965 mini-computer?

Because the 2650 was not designed long before it was released.  J. Kessler  was hired by Signetics in 1972 in part to help design an 8-bit processor.  Kessler was hired by Jack Curtis, (Of Write Only Memory fame) from…IBM. Kessler designed the architecture very similar to the IBM 1130 and Kent Andreas did the silicon layout.  The design contains 576 bits of ROM (microcode mainly), ~250 bits of RAM (for registers, stack, etc) and about 900 gates for logic.  Clock speed was 1.25MHz (2MHz on the -1 version) on a ion implanted NMOS process, very good for 1972 (this was as fast as the fastest IBM 1130 made), but Signetics was tied up working with Dolby Labs on audio products (noise canceling etc) and didn’t have the resources (or perhaps the desire) to do both, so the 2650 was pushed back to 1975.  In 1972 the IBM 1130 it was inspired by was still being made.  If the 2650 had been released in 1972 it would have had the Intel 4004 and 8008 as competition, both of which were not easy to use, and had complex power supply and clocking requirements.  The 2650 needed a 5V supply, and a simple TTL single phase clock.

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October 4th, 2016 ~ by admin

Testing all the ARMs

ARM946E on a Chartered Semiconductor 0.18u Process

ARM946E on a Chartered Semiconductor 0.18u Process

ARM is one of the most popular RISC cores used today, and has been for over a decade now.  ARM is an IP company. They license processor designs/architectures for others to use, but do not actually manufacturer the processors themselves….or do they?

ARM offers a variety of cores, and licenses them in a variety of different ways.  There are, in general, three main ways to get an ARM design.  Larger companies with may resources (such as Apple, Broadcom, or Qualcomm) will purchase an ARM architecture license.  This isn’t specific to any ARM core in particular (such as say a ARM946) but the entire ARM architecture, allowing these companies to design their own ARM processors from the ground up.  This takes a lot of resources and talent that many companies lack.

Second, ARM offers RTL (Register Transfer Level) processor models, these are provided in a hardware programming language such as VHDL or Verilog.  They can be dropped into a design along with other IP blocks (memory, graphics, etc) and wrapped with whatever a company needs.  This is a fairly common method, and typically the lest expensive.  It does require more work and testing though.  Designing a chip is only part of the process. Once it’s designed it still must be fab’d.

ARM7EJ-S on a TSMC 0.18u Process. Wafer #25 from June 2003

ARM7EJ-S on a TSMC 0.18u Process. Wafer #25 from June 2003

ARM also offers ARM models that are transistor level designs, pre-tested on various fab processes.  Pre-tested means exactly what it sounds like. ARM designed, built and had them manufactured, fixing any problems, and thus giving the ability to say this core will run at this speed on this fab’s process.  Testing and validation may often go as far as testing a particular fab’s particular process, in a particular package.  Its more work, and thus cost more, but these make for drop in ARM cores. Want to use a ARM946 core, on a TSMC 0.18u process in a lead free Amkor BGA package? Yah ARM’s tested that and can provide you with a design they know is compatible.  This allows extremely fast turn around from concept, to design to silicon.

In the below picture (click to enlarge) you can see a large variety of ARM cores from the early 2000’s. They span ARM7, ARM9, ARM10 and ARM11 designs.  Each is marked with info as to what exactly it is.  The core name, the revision (such as r2p0, meaning major revision 2, pass/subversion 0) as well as the Fab (TSMC, UMC, SMIC, Chartered) and the design node (all of these are either 0.18 or 0.13u processors).

21 Various ARM design tet chips from TSMC, UMC, Charted, covering many ARM cores.

21 Various ARM design tet chips from TSMC, UMC, Charted, covering many ARM cores.

Also noted on some is the exact wafer the die was cut from, this is typical on VERY early production tests, usually first run silicon, so they can identify any physical/manufacturing defects easier.  Some design modifications have little to do with the processor itself, but are done to increase yields on a given process/node.

ARM926EJ on a UMC 0.13u Process. THe package has a removable die cover.  Note the large die, thought he processor core itself is very small (its in the upper left)

ARM926EJ on a UMC 0.13u Process. 

Package type (in this case most are Amkor BGA) and other features are noted.  Many say ‘ETM’ which is ARM’s Embedded Trace Macrocell, a debugging tool that allows instruction and date traces of an in operation core, very useful for debugging. ARM offers ETM for each of their processor types (ETM9 for example covers all ARM9 type cores) and itself has a revision number as well.

Some of these chips come in an interesting BGA package. The package has a removable die cover for inspection/testing (and possibly modification). Note the large die in the ARM926EJ on the left, though the processor core itself is very small (its in the upper left only a few square mm).  This is done to facilitate bonding into the package, In this type of package there wouldn’t be any way to connect all the bonding wires to the very tiny ARM core, so the die has a lot of ‘wasted’ space on it.

So does ARM make processors? Yup! but only for internal use, to help develop the best possible IP for their clients.



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September 13th, 2016 ~ by admin

OSIRIS-REx: Bringing Back Some Bennu

OSIRIS-Rex: RAD750 to Bennu

OSIRIS-Rex: RAD750 to Bennu

The Apollo Group  carbonaceous asteroid Bennu is a potential Earth impactor, with a 0.037% likelihood of hitting earth somewhere between 2169 and 2199.  Bennu is thought to be made of materials left over from the very early beginnings of our solar system, making researching them a very tantalizing proposition.  Rather than wait for the small chance of Bennu delivering a sample to Earth in 150 years the thoughtful folks at NASA decided to just go fetch a bit of Bennu.  Thus is the mission of OSIRIS-REx which was launched a few days ago (Sept 8, 2016) aboard an Atlas V 441 as an $850 Million New Frontiers mission.

Somewhat surprisingly there is scant details about the computer systems that are driving this mission to Bennu.  OSIRIS-REx is based on the design of the Mars Reconnaissance Orbiter (MRO), MAVEN and Juno, and thus is based on the now ubiquitous BAE RAD750 PowerPC processor running the redundant A/B side C&DH computers.  This is the main ‘brain’ of the Lockheed Martin built spacecraft.  Of course the dual RAD750s are far from the only processors on the spacecraft, with communications, attitude control, and instrumentation having their own (at this point unfortunately unknown) processors.

REXIS Electronics: Virtex 5QV - Yellow Blocks are Off the Shelf IP, Green Blocks are custom by the REXIS Team. Powered by a Microblaze SoftCore.

REXIS Electronics: Virtex 5QV – Yellow Blocks are Off the Shelf IP, Green Blocks are custom by the REXIS Team. Powered by a Microblaze SoftCore.

One instrument in particular we do know a fair amount about though.  Regolith X-ray Imaging Spectrometer (REXIS) is a student project from Harvard and MIT. REXIS maps the asteroid by using the Sun as an X-ray source to illuminate Bennu, which absorbs these X-rays and fluoresces its own X-rays based on the chemical composition of the asteroid surface. In addition REXIS also includes the SXM, to monitor the Sun’s X-Rays providing context to what REXIS is detecting as it maps Bennu.  REXIS is based on a Xilinx Virtex-5QV Rad-Hard FPGA.  This allows for a mix of off the shelf IP blocks, and custom logic as well. The 5QV is a CMOS 65nm part designed for use in space.  Its process, and logic design are built such as to minimize any Single Event Upsets (SEU), and other radiation induced errors.  It is not simply a higher tested version of a commercial part, but an entirely different device.   Implemented on this FPGA is a 32-bit RISC softcore processor known as Microblaze.  The Microblaze has ECC caches implemented in the BRAM (Block RAM) of the FPGA itself and runs at 100MHz.

It will take OSIRIS-REx 7 years to get to Bennu, sample its surface, and return its sample to Earth.  By the time it gets back, the RAD750 powering it may not be so ubiquitous, NASA is working on determining what best to replace the RAD750 with in future designs.  Currently several possibilities are being evaluated, including a QuadCore PowerPC by BAE, a QuadCore SPARC (Leon4FT), and a multi-core processor based on the Tilera architecture.  As with consumer electronics, multi-core processors can provide similar benefits in space of hogher performance and more flexible power budgeting all with the added benefit (when design for such) of increased fault tolerance.

August 25th, 2016 ~ by admin

Intel i486 Prototype: Intel’s Gamble with CISC

Intel A80486DX SXE19 Engineering Sample - May 1989

Intel A80486DX SXE19 Engineering Sample – May 1989

The Intel 80486 was announced at COMDEX in April 11th 1989, justy 3 years after the 80386 hit the market.  The 80486 was really a greatly enhanced 80386. It added a few instructions, on-chip 8KB Write-Thru cache (available off chip on 386 systems) as well as an integrated FPU.  Instruction performance was increased through a tight pipeline, allowing it to be about twice as fast as the 80386 clock for clock.  Like the 80386 the 80486 was a CISC design, in an era when the RISC processor, in its may flavors, was being touted as the future of ALL computing.  MIPS, SPARC, and ARM all were introduced in the late 1980’s.  Intel themselves had just announced a RISC processor, the i860, and Motorola had the 88k series.  Intel in fact was a bit divided, with RISC and CISC teams working on different floors of the same building, competing for the best engineering talent.  Would the future be CISC, with the 80486? Or would RISC truly displace the CISC based x86 and its 10 years of legacy?

This dilemma is likely why Intel’s CEO, Andy Grove, was nearly silent at COMDEX.  It was only 4 years previous the Mr. Grove, then as President, made the decision to exit the memory market, and focus on processors, and now, a decision would soon loom as to which type of processor Intel would focus on.  Intel eventually ditched the i860 and RISC with it, focusing on the x86 architecture.  It turns out that ultimately CISC vs RISC didn’t greatly matter, studies have shown that the microarchitecture, rather then the Instruction Set Architecture, is much more important.

Intel A80486DX-25 - SX249 - B4 Mask from Sept 1989 with FPU Bugs

Intel A80486DX-25 – SX249 – B4 Mask from Sept 1989 with FPU Bugs

Whether due to the competition from the i860 RISC team, or knowing the markets demands, the 80486 team knew that the processor had to be executed flawlessly.  They could ill afford delays and bugs.  Samples of the 80486 were scheduled to be released in the 3rd quarter of 1989 with production parts shipping in the 4th quarter.  The above pictured sample is from May of 1989, a quarter ahead of schedule.  Production parts began to ship in late September and early October, just barely beating the announced ship date.

Perhaps due to the rush to get chips shipping a few minor bugs were found in the FPU of the 486 (similar to bugs found in the FPU of the 387DX).  Chips with the B4-Mask revision and earlier were affected (SX249).   These bugs were relatively minor and quickly fixed in the B5 mask revision (SX250), which became available in late November of 1989, still within Intel’s goal of the 4th Quarter.

The 80486 was a success in the market and secured CISC as the backbone of personal computing.  Today, the CISC x86 ISA is still used, alongside the greats of RISC as well.

August 19th, 2016 ~ by admin

CPU of the Day: Motorola MC6801 – The (second) first 6800 MCU

Motorola XC6801L - Early White ceramic package from 1979. XC denotes a not fully qualified part.

Motorola XC6801L – Early White ceramic package from early 1979. XC denotes a not fully qualified part.

A microcontroller (or microcomputer) is a CPU, with additional on-board peripherals, usually containing RAM, ROM, and I/O as to serve as a single (or close to single) chip solution for a computer system.  As the program space is typically small, they were designed and used for high volume, low cost, simple applications.  Today we would refer to them as embedded applications.  The Motorola MC6800, released in 1974 was a decent 8-bit processor.  It was however not inexpensive (a fact not lost upon one of its designers, Chuck Peddle, who left to design the 6502).  Initial pricing for the MC6800 was $360, dropping to $175 the next year.

For embedded use, prices needs to be in the few dollars range, with as little chips as possible required for a design.  By 1977 Motorola had a solution, the MC6802.  This MC6802 was an enhanced MC6800 64-bytes of RAM and an on-board clock-generator.  When combined with the MC6846 (which provided ROM, I/O and Timers) a complete system could be built.  Defective MC6802s were often sold as RAM-less MC6808s.

Motorola MC6802L - Dated March of 1978. The 6802 had 64-bytes of RAM and no ROM.

Motorola MC6802L – Dated March of 1978. The 6802 had 64-bytes of RAM and no ROM.

The MC6802 was followed by the more complex MC6801, which integrates the features of the MC6846 on die, as well as increasing the RAM to 128-bytes, making a true 8-bit single chip microcomputer.  Most sources refer to the MC6801 being released in 1978, however it was actually released in 1977, likely at the same time, or similar as the MC6802.  US Patent Application US4156867 filed on September 9th of 1977 references both processors.  GM was to be the lead customer for the MC6801, it was the MCU of choice for the digital trip meter (TripMaster) of the 1978 Cadillac Seville.  The 1978 Seville began production on September 29, 1977.  It is likely that all of the first production of the 6801 was reserved for GM, and it wasn’t until 1978 and later that Motorola began to market it (it begins to show up in Motorola marketing only in 1979).  The TripMaster was a $920 factory option that proved to be rather unpopular, likely due to it adding nearly $1000 in cost to a $14,000 car.

Motorola MC68701U4L-1 1987 6801 with upgraded RAM/ROM and Timers

Motorola MC68701U4L-1 1987 6801 with upgraded RAM/ROM and Timers

This lack of early availability, coupled with the fact that while capable, the 35,000 transistor 6801 wasn’t particularly inexpensive led it to have very little success in the market.  The EPROM version, the MC68701 infact is much more common, likely due to the fact that it was used in lower volume products, where cost wasn’t such an issue.  In 1979 Motorola attempted to remedy this by releasing the MC6805 series.  This was designed from the ground up to be low cost.  The first versions had half the ROM and half the RAM as the 6801, while keeping the I/O.  They were also available in CMOS (as the MC146805).  They were inexpensive, and highly functional, and were widely used.  The 6805 continues to see use today as the 68HC05 and 68HC08 series.

Motorola XC68HC11A0FN - 1987 - Preproduction, Enhanced 6801

Motorola XC68HC11A0FN – 1987 – Preproduction, Enhanced 6801

The MC6801 was not, however, done.  By this time manufacturing had improved, allowing costs to be lower.  Motorola released an upgraded 6801, the MC6801U4 which expanded the timer functions, increased the ROM to 4K, and increased the RAM to 192-bytes.   In 1985 the MC6801 was upgraded again, a second 16-bit index register was added, as well as true bit-manipulation instructions.  The Motorola MC68HC11, the name change reflecting the greatly enhanced core, was made in many varieties with different sizes of RAM, ROM, and EEPROM. The MC68HC11A8 was also the first MCU to integrate EEPROM on die, in this case, 512 bytes worth.  The MC68HC11 series, and its 68HC12 and 16 successors, continue to be made, and used today, ironically, frequently in automotive applications, where the original MC6801 failed to be a success.



August 8th, 2016 ~ by admin

Intel MCS-86 Test Systems now available.

MCS-86 Test Boards For SaleThe CPU Shack is pleased to now offer test systems for testing the famous Intel 8086 and 8088 processors.  They also support testing of the 8087 FPU, as well as the NEC variants (V20/V30).  As an added bonus, an expansion is included for testing the i186/i188 processors as well.

Of course the original NMOS,  and later CMOS versions are supported from many manufacturers.

Head on over to the MCS-86 Test System page for more information and to order your system.


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July 11th, 2016 ~ by admin

Sparkplugs, O-Scopes and Cell Phones…

AMD 486 processor. Note the logo in the lower right corner. Package is from Kyocera (Click for larger version)

AMD 486 processor. Note the logo in the lower right corner. Package is from Kyocera (Click for larger version)

What do all 3 of these things have in common? And what in the world do they have to do with computer processors (ok modern oscilloscopes and cell phones DO have CPUs in them but spark plugs?). Tektronix was started here in Oregon in 1946 making oscilloscopes and other test equipment.  Throughout the last 70 years they have continued to do so, but along the way they also began to make everything needed to manufacture the final equipment they sold.  Design/simulation software, PCB manufacturing, IC manufacturing, displays, and even the packaging used for IC’s.  In recent years many of these vertically integrated operations have been spun off, but they do still maintain some.

Tektronix packaging options from the early 1990's (Click for larger version)

Tektronix packaging options from the early 1990’s (Click for larger version)


When an IC manufacturer (such as Intel, AMD, etc) designs/builds an IC what they typically are creating (or having made in the case of fabless companies) is the silicon die itself.  This little piece of silicon contains the millions of transistors needed to perform whatever task its made for, but for most uses that silicon die needs to be packaged to be useful.  A sliver of silicon is hard to work with and integrate into designs, a package provides the routing of wire/leads to the die, as well as protects it from the environment, while dissipating any heat it generates.

IC manufactures do not typically make their own packages, they are either contracted out or bought off the shelf.  Tektronix is one of several companies that makes and sells IC packages.  The pictured display is a sample of some of the packaging types they offered.  You can recognize some of the more common packages, as well as some more specialty ones such as the ‘POWER TAB’ that was used in analog equipment frequently (like audio amplifiers etc).

Anam/Amkor Test package

Anam/Amkor Test package

Tektronix isn’t the only company that offers packages for IC.  Perhaps the two largest are NGK and Kyocera.  Both have extensive experience with ceramics, a material very useful in IC packages.  Developing high strength, high temperature ceramics for spark plugs, isn’t so much different from designing the same for a high end processor.  Kyocera started life making ceramic insulators, well before ever getting into cell phones (in 2000) and ceramic packaging continues to be their core business.

Often times assembly and test of a IC is handled by yet another company.  Many companies (such as Amkor) entire business is based on taking IC dies from one company, assembling them into packages from another, testing them, and shipping them.  So next time you look at a CPU and read its makers name boldly written on its top, there is a good chance that that name had but one part in that IC.

July 3rd, 2016 ~ by admin

Juno Joins Jupiter: And Brings Some Computers For The Trip

Juno - RAD750 Powered Mission to Jupiter

Juno – RAD750 Powered Mission to Jupiter

NASA’s Juno mission to Jupiter arrives in just about a day, after a 5 year journey that began in August of 2011 aboard an Atlas V rocket.  The Juno mission is primarily concerned with studying the magnetic fields, particles, and structure of Jupiter.  Finding out how Jupiter works, and what its core is made of are some of Juno’s goals.  None of the experiments need a camera, but NASA decided, in the interest of public outreach and education, that if you are going to spend $1 billion to send a probe to Jupiter, it probably should have a camera.  Energetic particle detectors, Magnetometers, and Auroral Mappers are great for science, but what the public is inspired by is pretty pictures of wild and distant worlds.

Juno is powered by a now familiar computer, the BAE RAD750 PowerPC radiation hardened computer.  It operates at up to 200MHz (about the processing power of a mid 1990’s Apple Computer) and includes 256MB of Flash memory and 128MB of DRAM.  It (and the other electronics) are encased in a 1cm thick titanium radiation vault.  Flying in a polar orbit around Jupiter, Juno will experience intense radiation and magnetic fields.  The probe is expected to encounter radiation levels in the order of 10Mrads+.  The vault limits this to 25krads, within what the electronics can handle.  It should be noted that a dose of 10krads is fatal in most cases.  This intense of radiation will degrade the prober, even with shielding, resulting in a mission life of only 37 orbits (a little over a year) before the probe will be gracefully crashed into Jupiter.

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July 1st, 2016 ~ by admin

Signetics 2650 Test Boards Now Available

Signetics 2650 Test Board For SaleContinuing our goal of having test boards available for pretty much every common architecture of the 1970’s we now have a board available for testing Signetics (and later Philips) 8-bit NMOS processor, the 2650, 2650A and 2650B.  Made on a cool black PCB they are a fairly simple system, but are capable of testing some of the special features of the 2650 as well as the added features of the 2650B (if anyone happens to locate one)

These chips did not achieve the wide microcomputer success hoped for (likely due to a lack of second sourcing) they did find their way into many industrial/embedding systems, as well as many arcade/video games (including some made by ATARI).

These boards are in stock, and ship world wide for $94.95.  Head on over to the 2650 page to grab one.

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