January 20th, 2014 ~ by admin

Welcome Back Rosetta: The Dynex MAS31750 Awakens

Rosetta Comet Chaser - Dynex 1750

Rosetta Comet Chaser – Dynex 1750

The ESA’s comet chaser Rosetta has just today awoken from a long deep sleep on its comet chasing (and landing) mission.  The solar powered spacecraft was launched back in 2004.  It is based on the Mars Mariner II (itself based on the Voyager and Galileo) spacecraft design of the early 1990s (when the mission was first conceived.)  Main differences include using very large solar arrays versus a RT (Radioisotope Thermal Generator) and upgraded electronics.

In order to conserve power on its outward loop (near Jupiter’s orbit) most all systems were put to sleep in June of 2011 and a task set on the main computer to waken the spacecraft 2.5 years later and call home.  The computer in charge of that is powered by a Dynex MAS31750 16-bit processor running at 25MHz, based on the MIL-STD-1750A architecture.

A reader recently asked why such an old CPU design is still being used rather then say an x86 processor.  As mentioned above the Rosetta design was began in the 1990′s, the 1750A was THE standard high reliability processor at the time, so it wasn’t as out of date as it is now that its been flying through space for 10 years (and 10 years in the clean room).  The 1750A is also an open architecture, no licenses are or were required to develop a processor to support it (unlike x86). Modern designs do use more modern processors such as PowerPC based CPUs like the RAD750 and its older cousin the RAD6000.  Space system electronics will always lag current tech due to the very long lead times in their design (it may be 10 years of design n the ground before it flies, and the main computer is selected early on).  x86 is used in systems with 1) lots of power, and 2) somewhat easily accessible.  Notably the International Space Station and Hubble.  x86 was not designed with high reliability and radiation tolerance in mind, meaning other methods (hardware/software) have to be used to ensure it works in space.

Currently the ESA designs with an open-source processor known as the LEON, which is SPARC-V8 based.

January 18th, 2013 ~ by admin

CPU of the Day: Cypress CY7C601 25MHz SPARC

Cypress CY7C601-25GC

Cypress CY7C601-25GC – First package with heatspreader – Omitted on later versions

In Mid-1987 Sun Microsystems (now owned by Oracle) released the SPARC (Scalable Processor ARChitecture)  processor architecture to be used in their computers (replacing the 68k based systems they had previously used).  The SPARC was designed from the outset to be an open architecture, allowing manufactures to license and built processors that implemented it using whatever technology they wished.  The goal of this was to 1) build a large SPARC ecosystem and 2) keep prices in check by fostering competition among manufacturers.  The SPARC is still used today by Oracle, Fujitsu, the European Space Agency and others, owing largely to its design as an open architecture from the very beginning.

The first version was made by Fujitsu on a 20,000 gate array at 1.2 micron and ran at 16.6MHz.  In July 1988 Cypress  (later to be spun off as Ross and make the famous HyperSPARC line) announced the CY7C601.  This was the fastest implementation of the SPARC at the time.  It was made on 0.8u CMOS process and contained 165,000 transistors, dissipating around 3.3Watts.  As was typical of many processor designs of the time, it was an integer only processor, requiring a separate chip (the CY7C602) for floating point work.  In September of 1988, Cypress cross licensed the ’601 to Texas Intruments in exchange for rights to the 8847 floating point processor.  This was mainly to appease one of Cypress main customers who demanded that a second source for the ’601 chips be available, a demand more common in the 1970s then in 1988 but Cypress obliged.  Cyrpress also gained the rights to make the next generation SPARC processor that TI was developing.  TI would go on to make many SPARC processors, and continued to be the primary fab for Sun up through the SPARC T2 Plus in 2008.  Oracle now used TSMC to fab the T3 and T4 SPARC processors.

July 27th, 2009 ~ by admin

The other Atmel: Radiation Hardened Sparc CPU’s

When you think of Atmel what do you typically thing? High Speed 8051 microcontrollers and AVR RISC processors.  Maybe the occasional EEPROM. But there is another side of Atmel.

Atmel AT697F Rad-Hard SPARC

Atmel AT697F Rad-Hard SPARC

Atmel also makes a line of radiation hardened space qualified SPARC CPU’s. These are used extensively by the  European Space Agency and other satellite builders.  Atmel just released anew one too. The AT697F, a revision of the AT697E. What can it do? well oits a full 32bit SPARC V8 core, running at 100MHz (90MIPS). Its made on 0.18u which is very impressive for a space based processors. Most of Atmels other designs are basing on a half micron process.

A larger process like half a micron gives increased radiation resistance, but at the expense of speed. At 0.18u Atmel has got the speed up to 100MHz, AND increased radiation tolerance to 300krads.  To put that in perspective, a dose of only 1 krad (1000 rems) will kill you 99% of the time so these processors can continue to function at over 300 times that.

Source:  EE Product Center