January 28th, 2017 ~ by admin

Stratus: Servers that won’t quit – The 24 year running computer.

Stratus XA/R (courtesy of the Computer History Museum)

Making the rounds this week is the Computer World story of a Stratus Tech. computer at a parts manufacturer in Michigan.  This computer has not had an unscheduled outage in 24-years, which seems rather impressive.  Originally installed in 1993 it has served well.  In 2010 it was awarded for being the longest serving Stratus computer, then being 17 years.  Phil Hogan, who originally installed the computer in 1993, and continues to maintain it to this day said in 2010  “Around Y2K, we thought it might be time to update the hardware, but we just didn’t get around to it”  In other words, if it’s not broke, don’t fix it.

Stratus computers are designed very similar to those used in space.  The two main difference are: 1) No need for radiation tolerant designs, let’s face it, if radiation tolerance becomes an issue in Michigan, there are things of greater importance than the server crashing and 2) hot swappable components.  Nearly everything on a Stratus is hot-swappable.  Straus servers of this type are based on an architecture they refer to as pair and spare.  Each logical processor is actually made from 4 physical CPU’s.  They are arranged in 2 sets of pairs.

Stratus G860 (XA/R) board diagram. Each board has 2 voting i860. (the pair) and each system has 2 boards (the spare).  The XP based systems were similar but had more cache and supported more CPUs.

Each pair executes the exact same code in lock-step.  CPU check logic checks the results from each, and if there is a discrepancy, if one CPU comes up with a different result than the other, the system immediately disables that pair and uses the remaining pair.  Since both pairs are working at the same time there is no fail-over time delay, it’s seamless and instant.  The technician can then pull the mis-behaving processor rack out and replace it, while the system is running.  Memory, power supplies, etc all work in similar fashion.

These systems typically are used in areas where downtime is absolutely unacceptable, banking, credit card processing, and other operations are typical.  The exact server in this case is a Stratus XA/R 10.  This was Stratus’s gap filler.  Since their creation in the early 1980’s their servers had been based on Motorola 68k processors, but in the late 1980’s they decided to move to a RISC architecture and chose HP’s PA-RISC.  There was a small problem with this, it wasn’t ready, so Stratus developed the XA line to fill in the several years gap it would take. The first XA/R systems became available in early 1991 and cost from $145,000 to over $1 million.

Intel A80860XR-33 – 33MHz as used in the XA/R systems. Could be upgraded to an XP.

The XA is based on another RISC processor, the Intel i860XR/XP.  Initial systems were based on 32MHz i860XR processors.  The 860XR has 4K of I-cache and 8K of D-cache and typically ran at 33MHz.  Stratus speed rating may be based on the effective speed after the CPU check logic is applied or they have downclocked it slightly for reliability. XA/R systems were based on the second generation i860XP.  The 860XP ran at 48MHz and had increased cache size (16K/16K) and had some other enhancements as well.  These servers continued to be made until the Continuum Product Line (Using Hewlett Packard “PA-RISC” architecture) was released in March of 1995.

This type of redundancy is largely a thing of the past, at least for commercial systems.  The use of the cloud for server farms made of hundreds, thousands, and often more computers that are transparent to the user has achieved much the same goal, providing one’s connection to the cloud is also redundant.  Mainframes  and supercomputers are designed for fault tolerance, but most of it is now handled in software, rather than pure hardware.

November 5th, 2016 ~ by admin

GRAPE-6 Processor: A Gravitational Force of Reckoning

GRAPE-6 Processor - 90MHz

GRAPE-6 Processor – 90MHz -2000

Understanding the movements of the stars has been on mankinds mind probably since we first stared into the sky.  Through the ages we can predict where a star or planet will be in the sky in the next few months, years, even hundreds of years, but to be able to predict the exact orbital details for ALL time is rather more tricky.

This helps understand how planetary systems form, and the conditions that make that possible.  It allows us to see what happens when two massive black holes pass each other by, will the merge? will they orbit? will one go rogue?  These are interactions that take millions of years, and thus we need to calculate the gravitational forces very accurately. This isnt a terribly hard problem for two bodies, and is doable for three with little fuss, but for numbers of bodies greater then that, the calculations grow rapidly, on the order of N2/2.

In the late 1980’s Tokyo University began work on developing a computer to calculate these forces.  Every gravitational force had to be be calculated with its effects on every other body in the system.  These results were then fed to a commodity computer for summation and final results.  This made the Tokyo project a sort of Gravity co-processor, or as they called it a Gravity Pipeline, GRAPE for short.  The GRAPE would do the main calculations and feed its results to another computer.

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September 13th, 2016 ~ by admin

OSIRIS-REx: Bringing Back Some Bennu

OSIRIS-Rex: RAD750 to Bennu

OSIRIS-Rex: RAD750 to Bennu

The Apollo Group  carbonaceous asteroid Bennu is a potential Earth impactor, with a 0.037% likelihood of hitting earth somewhere between 2169 and 2199.  Bennu is thought to be made of materials left over from the very early beginnings of our solar system, making researching them a very tantalizing proposition.  Rather than wait for the small chance of Bennu delivering a sample to Earth in 150 years the thoughtful folks at NASA decided to just go fetch a bit of Bennu.  Thus is the mission of OSIRIS-REx which was launched a few days ago (Sept 8, 2016) aboard an Atlas V 441 as an $850 Million New Frontiers mission.

Somewhat surprisingly there is scant details about the computer systems that are driving this mission to Bennu.  OSIRIS-REx is based on the design of the Mars Reconnaissance Orbiter (MRO), MAVEN and Juno, and thus is based on the now ubiquitous BAE RAD750 PowerPC processor running the redundant A/B side C&DH computers.  This is the main ‘brain’ of the Lockheed Martin built spacecraft.  Of course the dual RAD750s are far from the only processors on the spacecraft, with communications, attitude control, and instrumentation having their own (at this point unfortunately unknown) processors.

REXIS Electronics: Virtex 5QV - Yellow Blocks are Off the Shelf IP, Green Blocks are custom by the REXIS Team. Powered by a Microblaze SoftCore.

REXIS Electronics: Virtex 5QV – Yellow Blocks are Off the Shelf IP, Green Blocks are custom by the REXIS Team. Powered by a Microblaze SoftCore.

One instrument in particular we do know a fair amount about though.  Regolith X-ray Imaging Spectrometer (REXIS) is a student project from Harvard and MIT. REXIS maps the asteroid by using the Sun as an X-ray source to illuminate Bennu, which absorbs these X-rays and fluoresces its own X-rays based on the chemical composition of the asteroid surface. In addition REXIS also includes the SXM, to monitor the Sun’s X-Rays providing context to what REXIS is detecting as it maps Bennu.  REXIS is based on a Xilinx Virtex-5QV Rad-Hard FPGA.  This allows for a mix of off the shelf IP blocks, and custom logic as well. The 5QV is a CMOS 65nm part designed for use in space.  Its process, and logic design are built such as to minimize any Single Event Upsets (SEU), and other radiation induced errors.  It is not simply a higher tested version of a commercial part, but an entirely different device.   Implemented on this FPGA is a 32-bit RISC softcore processor known as Microblaze.  The Microblaze has ECC caches implemented in the BRAM (Block RAM) of the FPGA itself and runs at 100MHz.

It will take OSIRIS-REx 7 years to get to Bennu, sample its surface, and return its sample to Earth.  By the time it gets back, the RAD750 powering it may not be so ubiquitous, NASA is working on determining what best to replace the RAD750 with in future designs.  Currently several possibilities are being evaluated, including a QuadCore PowerPC by BAE, a QuadCore SPARC (Leon4FT), and a multi-core processor based on the Tilera architecture.  As with consumer electronics, multi-core processors can provide similar benefits in space of hogher performance and more flexible power budgeting all with the added benefit (when design for such) of increased fault tolerance.

July 3rd, 2016 ~ by admin

Juno Joins Jupiter: And Brings Some Computers For The Trip

Juno - RAD750 Powered Mission to Jupiter

Juno – RAD750 Powered Mission to Jupiter

NASA’s Juno mission to Jupiter arrives in just about a day, after a 5 year journey that began in August of 2011 aboard an Atlas V rocket.  The Juno mission is primarily concerned with studying the magnetic fields, particles, and structure of Jupiter.  Finding out how Jupiter works, and what its core is made of are some of Juno’s goals.  None of the experiments need a camera, but NASA decided, in the interest of public outreach and education, that if you are going to spend $1 billion to send a probe to Jupiter, it probably should have a camera.  Energetic particle detectors, Magnetometers, and Auroral Mappers are great for science, but what the public is inspired by is pretty pictures of wild and distant worlds.

Juno is powered by a now familiar computer, the BAE RAD750 PowerPC radiation hardened computer.  It operates at up to 200MHz (about the processing power of a mid 1990’s Apple Computer) and includes 256MB of Flash memory and 128MB of DRAM.  It (and the other electronics) are encased in a 1cm thick titanium radiation vault.  Flying in a polar orbit around Jupiter, Juno will experience intense radiation and magnetic fields.  The probe is expected to encounter radiation levels in the order of 10Mrads+.  The vault limits this to 25krads, within what the electronics can handle.  It should be noted that a dose of 10krads is fatal in most cases.  This intense of radiation will degrade the prober, even with shielding, resulting in a mission life of only 37 orbits (a little over a year) before the probe will be gracefully crashed into Jupiter.

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March 10th, 2016 ~ by admin

Milandr K1886VE: The PIC That Went to Russia

Milandr K1886VE2U PIC17C756A w/ Flash Memory

Milandr K1886VE2U PIC17C756A w/ Flash Memory

We have previously talked about the Microchip PIC17, and its less then stellar success in the market.  After being introduced in the early 1990’s it was discontinued in the early 2000’s, though Microchip continued to provide support (and some devices) to users for some time after that.

In the early 1990’s a IC company was formed in Zelenograd, Russia (just a short distance to the NW of Moscow), the silicon valley of Russia, home to the Angstrem, and Micron IC design houses.  This company was Milandr, one of the first post-Soviet IC companies, with ambitious plans, and many highly capable engineers from the Soviet times.  They are a fabless company, though with their own packaging/test facilities, specializing in high reliability metal/ceramic packages.

The K1886VE is Milandr’s version of a PIC17C756A, though updated for the 21st century.  While mask-ROM versions are available the VE2 version replaces the ROM with modern FLASH memory.  This is a upgrade that perhaps would have kept the PIC17 alive if Microchip would have done similar.  It is packaged in a 64 pins CQFP white ceramic package with a metal lid and gold leads, not what one is use to seeing a PIC in.  Production of these PICs continues at Milandr (the pictured example is from 2012), as customers still use the parts, mainly in industrial and other places where reliability is key.

The use of a PIC in high reliability applications isn’t something entirely new.  The Microhard MHX-2400 radio system, designed for small satellites such as cubesats, runs on a PIC17C756A, a version flew on NASA’s Genesat-1 in 2006 carrying bacteria samples.  Milandr does offer radiation resistant devices so its likely that some Milandr PIC has flown to space as well.

 

December 11th, 2015 ~ by admin

Akatsuki: Dawn rises again at Venus

Akatsuki - Though by now its main antenna is probably brown or black from being baked by the sun

Akatsuki – Though by now its main antenna is probably brown or black from being baked by the sun – Powered by a NEC uPD55117B-018 16-bit processor.

Akatsuki, Japanese for Dawn, was launched in May of 2010 for a journey to the morning star, Venus, on a JAXA H-IIA rocket. The H-IIA flight computer runs on a space rated version of the NEC V70 32-bit processor, running the NEC RX616 RTOS.  A processor significantly faster than that of the interplanetary probe it was launching.

“it will have a short cruise to Venus, entering its long, elliptical orbit in December. Its mission should last several years. “

In space, things don’t always go as planned…

On December 7th Akatsuki entered orbit around Venus, December of 2015 rather than 2010.  Due to a valve in the fuel pressurization system not opening all the way the orbital insertion engine ran much too lean on its attempt to enter orbit, causing it to overheat and catastrophically fail.  This left the probe on a heliocentric orbit, moving away from Venus.  The Japanese Space Administration (JAXA) was not deterred, Akatsuki’s orbit would eventually meet up with Venus again, almost exactly 5 years later.  JAXA determined they could use the probes attitude control thrusters, which feed off the same fuel tank as the failed main thruster, to insert Akatsuki into a highly elliptical, yet still useful orbit.  Had the Attitude control system used a separate fuel system (which is actually the more common design method) this would not have been possible, as it would take a relatively large amount of fuel, fuel that was available on Akatsuki due to the main engine failing and being shut down before its burn was completed.  It should be noted that such a maneuver had never previously been even proposed, let alone attempted.  There was however another small problem…

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March 6th, 2015 ~ by admin

Dawn to Ceres: Processors for the Protoplanet

Dawn's mission: Ceres

Dawn’s mission: Ceres

Dawn was launched in 2007 by NASA/JPL and was built by Orbital Sciences becoming their first interplanetary spacecraft.  Dawns mission was to visit the two largest dwarf planets in the Asteroid belt, Vesta and Ceres.  After visiting Vesta for over a year in 2011-2012 Dawn used its ion engines to break orbit, and travel to Ceres, a journey of 2.5 years.

In the next few hours Dawn will be captured by Ceres gravity and begin orbiting it.  These protoplanets, are very interesting scientifically as they provide a look into our solar systems past.  Dawn will orbit Ceres for several years and perhaps discover what the mysterious bright spots are, among other things.  Studying a planet, even a dwarf planet, requires processing power, and for that Dawn is well equipped.

Dawn is solar powered, so power budgets are of great concern.  At 3AU (three times further from the sun then Earth) Dawns solar panels are rates at about 1300 Watts.  This has to run all the science experiments, the main computers, the comms, and most importantly the electric ion engine, which uses electricity generated from the panels to excite and eject Xenon gas at very high velocities.  Thus, power consumption is more important then raw processor power here, especially for the systems that are on most of the time.

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November 12th, 2014 ~ by admin

Here comes Philae! Powered by an RTX2010

Comet 67P/Churyumov–Gerasimenko - Soon to have a pair of Harris RTX2010 Processors

Comet 67P/Churyumov–Gerasimenko – Soon to have a pair of Harris RTX2010 Processors

In less then an hour (11/12/2014 @ approx 0835 GMT) 511,000,000 km from Earth the Philae lander of the Rosetta mission will detach and begin its decent to a comets surface.  The orbiter is powered by a 1750A processor by Dynex (as we previously discussed).  The lander is powered by two 8MHz Harris RTX2010 16-bit stack processors, again a design dating back to the 1980’s.  These are used by the Philae CDMS (COmmand and Data Management System) to control all aspects of the lander.

All lander functions have to be pre programmed and executed by the CDMS with absolute fault tolerance as communications to Earth take over 28 minutes one way.  The pair of RTX2010s run in a hot redundant set up, where one board (Data Processing Unit) runs as the primary, while the second monitors it, ready to take over if any anomaly is detected.  The backup has been well tested as on each power cycle of Philae the backup computer has started, then handed control over to the primary.  This technically is an anomaly, as the CDMS was not programmed to do so, but due to some unknown cause it is working in such a state.  The fault tolerant programming handles such a situation gracefully and it will have no effect on Philae’s mission.

Why was the RTX2010 chosen?  Simply put the RTX2010 is the lowest power budget processor available that is radiation hardened, and powerful enough to handle the complex landing procedure.  Philae runs on batteries for the first phase of its mission (later it will switch to solar/back up batteries) so the power budget is critical.  The RTX2010 is a Forth based stack processor which allows for very efficient coding, again useful for a low power budget.

Eight of the instruments are also powered by a RTX2010s, making 10 total (running at between 8-10MHz).  The lander also includes an Analog Devices ADSP-21020 and a pair of 80C3x microcontrollers as well as multiple FPGAs.

 

January 20th, 2014 ~ by admin

Welcome Back Rosetta: The Dynex MAS31750 Awakens

Rosetta Comet Chaser - Dynex 1750

Rosetta Comet Chaser – Dynex 1750

The ESA’s comet chaser Rosetta has just today awoken from a long deep sleep on its comet chasing (and landing) mission.  The solar powered spacecraft was launched back in 2004.  It is based on the Mars Mariner II (itself based on the Voyager and Galileo) spacecraft design of the early 1990s (when the mission was first conceived.)  Main differences include using very large solar arrays versus a RT (Radioisotope Thermal Generator) and upgraded electronics.

In order to conserve power on its outward loop (near Jupiter’s orbit) most all systems were put to sleep in June of 2011 and a task set on the main computer to waken the spacecraft 2.5 years later and call home.  The computer in charge of that is powered by a Dynex MAS31750 16-bit processor running at 25MHz, based on the MIL-STD-1750A architecture.

A reader recently asked why such an old CPU design is still being used rather then say an x86 processor.  As mentioned above the Rosetta design was began in the 1990’s, the 1750A was THE standard high reliability processor at the time, so it wasn’t as out of date as it is now that its been flying through space for 10 years (and 10 years in the clean room).  The 1750A is also an open architecture, no licenses are or were required to develop a processor to support it (unlike x86). Modern designs do use more modern processors such as PowerPC based CPUs like the RAD750 and its older cousin the RAD6000.  Space system electronics will always lag current tech due to the very long lead times in their design (it may be 10 years of design n the ground before it flies, and the main computer is selected early on).  x86 is used in systems with 1) lots of power, and 2) somewhat easily accessible.  Notably the International Space Station and Hubble.  x86 was not designed with high reliability and radiation tolerance in mind, meaning other methods (hardware/software) have to be used to ensure it works in space.

Currently the ESA designs with an open-source processor known as the LEON, which is SPARC-V8 based.