March 11th, 2014 ~ by admin

IBM z800 MCM Mainframe Processor

IBM z800 MCM

IBM z800 MCM

Mainframes are the workhorses of the computing industry.  They process transactions for about every industry, and handle the brunt of the economy.  Their MTBF (Mean Time Between Failures) is measured in decades (typically 20-50 years).  A comparison to a home computer is hard to make, they are in an entirely different league, playing an entirely different game.

Data Intense vs. CPU Intense

Mainframe processors such as these work in what is referred to as ‘Data Intensive’ computing environments.  This is different from multi-cored processing that focuses on ‘CPU Intensive’ computing.  CPU intense has a relatively small data set, but most perform a lot of work on that set of data, or do the same instruction on a set of data (such as graphics).  CPU Intense processing can often be sped up with the addition of more processing cores.  Data Intense processing does not see as much benefit from adding cores.  Its biggest bottleneck is accessing the data, thus the System z tends to have VERY large caches, and very high bandwidth memory.  They typically operate on transactional type data, where the processing has to operate in a certain order (A has to be done before B which has to finish before C etc).

IBM was one of the first, and continues to be one of the largest suppliers of such systems.  Starting with the System/360 introduced in 1964 to the zSeries today.  The zSeries was first launched in 2000 with the z900, a significant upgrade from the System/390.  Data addressing was moved to 64-bits (from 31 bits) yet backwards compatibility (all the way back to the 360) is maintained.  The z900 ran at 775MHz and was built with a 35 die MCM containing 20 Processing Units (PUs) and 32MB of L2 Cache.

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February 18th, 2014 ~ by admin

CPU of the Day: IBM POWER5+ QCM

IBM POWER5+ QCM - 4 dies, 8 cores, and 72MB of L3 Cache

IBM POWER5+ QCM – 4 dies, 8 cores, and 72MB of L3 Cache

When the POWER5 processor was released in 2004 it was made in two versions, a DCM (Dual Chip Module) containing a POWER5 die and its 36MB L3 cache die, as well as a MCM containing 4 POWER5 die and 4 L3 cache dies totaling 144MB.  The POWER5 is a dual core processor, thus the DCM was a dual core, and the MCM an 8 core processor.  The POWER5 contains 276 million transistors and was made on a 130nm CMOS9S process.

In 2005 IBM shrank the POWER5 onto a 90nm CMOS10S manufacturing process resulting in the POWER5+.  This allowed speeds to increase to 2.3GHz from the previous max of 1.9GHz.  The main benefit from the process shrink was less power draw, and thus less heat.  This allowed IBM to make the POWER5+ in a QCM (Quad Chip Module) as well as the previous form factors.  The QCM ran at up to 1.8GHz and contained a pair of POWER5+ dies and 72MB of L3 Cache.

The POWER5+ was more then a die shrink, IBM reworked much of the POWER5 to improve performance, adding new floating point instructions, doubling the TLB size, improved SMP support, and an enhanced memory controller to mention just a few.

The result? A much improved processor and a very fine looking QCM.

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August 8th, 2013 ~ by admin

How To: Disassembling an IBM POWER4 MCM

The  IBM POWER4 was released in 2001.  It was a 1.1-1.9GHz dual core processor widely used in IBM’s server line including the RS/6000 and AS/400.  It can be commonly found as a single chip dual core, but also as a large MCM containing 4 POWER4 dies. These MCMs include a very large and heavy aluminium heatsink attached to a solid copper housing.  The complete unit weighs in at a hefty 3kg.  The heatsink and housing can be removed revealing a 230 gram MCM (with its small heat spreaders).

IBM POWR4 MCM disassembly

To disassemble one of these you will need a variety of tools.  A 4 mm socket, hex bits (2.5, 3 and 4mm), T8 torx bit , a medium flat tip screw driver, gloves and a good heat source (I use a propane torch)

Remove the Interposer and screws

First remove the 4 T8 torx screws that hold the interposer to the module.  It gets in the way and can melt easily.  Also remove the 8 3mm screws around the perimeter.  These hold the aluminium heatsink to the copper housing.

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July 26th, 2013 ~ by admin

Apple G3 Prototype: The Goleta and IBM Arthur Processor

IBM Arthur Processor - 1997

IBM Arthur Processor – 1997

By 1997 the PowerPC 604e was getting a bit dated.  Apple needed an updated faster processor for their new computers and IBM and Motorola needed a new processor to sell to Apple.  The PowerPC 750 was an evolution of the 604e and became the core of Apple’s various G3 systems.

In early 1997 Apple , IBM, and Motorola (together known as the AIM Alliance) were working on what would become the PowerPC 750.  It’s code name? The Arthur.  Apparently someone at IBM or Motorola had a liking for Sherlock Holmes as the 745 was codenamed Conan and the 755 Doyle, after Sir Arthur Conan Doyle, writer of Sherlock Holmes.  This particular part is date coded R20003PAP which means it was made in mid-May of 1997, 6 months before the G3 and PowerPC 750 were officially released.

The card the Arthur processor (hand labeled 300Mhz) resides on is an Apple Prototype known as the Goleta.  The Goleta was one of the first Apple G3 products.   It was to be used in the PowerMac 9700 aka the PowerExpress which was to be a 6 slot G3 PowerMac running at 275MHz.

Apple Goleta G3 Prototype

Apple Goleta G3 Prototype – Click here to see the full card.

It never made it past the prototype stage.  The card is labeled as serial #014 making it a very early prototype, though how many total were made is not known.  The card may have been used at Apple for testing other deigns as well and certainly was a test bench for the new 750 PowerPC Processor.  This was a chaotic time for Apple as they were struggling to pull out of near bankruptcy.  Steve Jobs had only just returned to the company and radically changed what Apple was doing, and what they were not doing (making money).

March 22nd, 2013 ~ by admin

CPU of the Day: IBM Micro/370 – True Mainframe on a chip

IBM System/370 - 1970

IBM System/370 – 1970

IBM introduced the 12.5MHz cabinet sized System/370 in June 1970 as an evolution of the System/360 from 1964.  These systems formed the entire base of IBM’s mainframe business.  Today’s System z, itself an evolution of the original System/360 and 370, can still run many of the original programs, unmodified, from 50 years ago.  This is a testament to 2 things, the wide adoption of the IBM systems, and the forward thinking of IBM.  Even the original System/360 from 1964 was a full 32-bit computer.  Single chip processors did not embrace 32 bit architectures until the very early 1980′s (Motorola 68k, National 32k, etc).

In 1980 IBM sought to make a single chip version of the 370, in an effort to make a version that could be used for desktop type computers.  This was to become the Micro/370.  There were 2 distinct products to come out of this goal that are widely confused and debated.  The first became the PC XT/370, an add in card(s) for an IBM PC to give it the capability to run System/370 software.  Later another version was developed called the Micro/370 as a single chip solution.

The PC XT/370 began as an experiment,  a test bed implementation of the System/370 in a microprocessor environment.  The goal was not to rebuild the 370 from the ground up (that would come later) but to merely implement its instruction set into an existing design.  The base processor had two main requirements:  it had to be 32 bits, and it had to be microcoded.  IBM’s engineers in Endicott, NY selected the then very new Motorola MC68000 processor as their basis.  It was one of the only 32-bit designs at them time so that no doubt helped in the selection process.

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March 13th, 2013 ~ by admin

IBM 3081 TCM Miniature Pendant

IBM 3081 TCM Pendant

IBM 3081 TCM Pendant

A few times I get things that are not processors but are memorabilia and are pretty special nonetheless.  Today these nice IBM pendants came in.  They are very small, measuring barely 37mm square but they weigh an impressive 60 grams.  They are a near perfect miniature version of a not so miniature IBM TCM (Thermal conduction module).  The 3081 TCM contained the cooling, and a very large MCM used in the 308x mainframe series (made from 1980-1987).  Each MCM contained up to 133 dies on a very large ceramic substrate with up to 16,000 contacts for the dies.  They were capable of speeds of up to 38MHz.  Each TCM was liquid cooled and dissipated around 300 watts of heat. A typical 308x system had 2 dozen of these.

A similar IBM MCM can be seen here: (a 9121 processor)

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Just For Fun

February 17th, 2013 ~ by admin

IBM Blue Gene/Q: The Heart of a Supercomputer

Usually we find vintage processors here at the CPU Shack Museum, however, from time to time, we get our hands on something very new, and usually significant.  If by significant one means the processor from a Top500 supercomputer then yes, it is significant.

IBM51Y7638_BlueGeneQ

IBM 51Y7638 – Produced Early 2012 – Blue Gene/Q 1.6GHz 18 Core PowerPC-A2

This is a Compute card from an IBM Blue Gene/Q (specifically the 6 rack BG/Q running at England’s Science & Technology Facilities Council Daresbury Lab in Cheshire).  A Blue Gene/Q system is made up of these cards, 32 per ‘Node Card’, and 1024 per rack. This doesn’t count the I/O board which use a similar design and contains 8 Compute cards per rack.

BlueGeneQ ASIC die shot

BlueGeneQ ASIC die shot

Each of the Compute cards contains a large ASIC (the large chip in the middle).  This ASIC contains 18 PowerPC-A2 processor cores running at 1.6GHz.  16 of them are ‘User’ cores, 1 is for system management (handles interrupts  message passing, etc) and the 18th is a spare, for increased fault tolerance. The ASIC also contains 32MB of shared L2 cache and a dual 1.3GHz memory controller for the 16GB of DDR3 memory on the card.   All said this 45nm chip contains 1.47 Billion transistors, but only dissipates 55Watts, granted, that adds up when you have thousands of them.

A ‘basic’ system contains 4 racks, so 4096 compute cards (4128 if you count the the I/O boards). Together this is 65,536 user cores and consumes upwards of 85kW of power (this actually makes it one of the most efficient super computers available).

So how do these cards become available?  Simply put when you have so many in a system, statistically you are going to have failures, and somewhat frequently.  IBMs target failure rate, based on a 96 rack system (which is massive) is 70 hours.  That’s one failure  every 3 days.  At this point the common reaction is to express shock at the dismal reliability of such a system, however, lets put it another way, that’s one failure out of 98,000+ Compute cards (yes there are other failure points but for the sake of argument we’re using just the compute cards).  If you run an IT department that services nearly 100,000 computers and you only have to fix something twice a week, there is a good chance you should get a raise.

 

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February 7th, 2013 ~ by admin

CPU of the Day: Unknown IBM MCM – Any ideas?

IBM MCM

Click for much larger

Every now and then I will get a chip in that I cannot ID.  This is a particularly perplexing one.  It looks like it should be something fairly well known, but I cannot determine what.  By the dates its a 2005 vintage IBM, MCM, on a fairly large ceramic package with 1077 lands.  It contains a pair of Infineon HYB39S256160DT-7 256Mbit (4Mbitx16bit) DRAMs which are 7ns 143MHz max, commonly used on PC133 SDRAM.   That works out to 64MB.  Also on the package is a IBM0436A8ACLAB 8Mbit (256Kx36) 4.5ns (222MHz) 1Mbyte SRAM.

IBM MCM die

IBM MCM die

Markings on the die are:
0FE45000L3
AKESXEX0
1 10-10
09K2262

 

If you have any ideas what it is, or what it may be, post a comment.  I may just give you one.  These came in with a lot of HP PA-RISC processors, so perhaps related?

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January 5th, 2013 ~ by admin

2012: Year in Review: Processors and FPUs

Welcome to 2013!  2012, was a busy year here at the CPU Shack Museum. We added 716 new processors/EPROMs/MCUs, which works out to an average of 2 new chips per day.  This includes 16 New in Box Processors. We also added 53 new Graphics Processors, which isn’t bad for something we only collect on the side.

Some processor highlights (in no particular order, click to enlarge):

HPIB21364-1300VP7

Here is a HP/Compaq 21364 1300MHz, this was the end of the road for the DEC Alpha architecture.  It was killed off in favor of the Itanium, for better or for worse.

IBMPOWER5+19GHz

The IBM POWER5+ MCM is a stunning chip to look at, clocked at 1.9GHz its a dual core with on package L3 cache

IntelMG80387-16-SM156

An Intel MG80387-16 SM156 US Military MIL-STD-883B spec math co processor for the 80386 processor.  Made in 1990

MME80A-CPU-9107

Going back in time further is this East German (MME) 80A CPU, a clone of  the Zilog Z80 made in 1991 (copied before unification, produced after, for this example).  Its always neat to see the white ceramic package, even well into the 1990′s.

NexGenNx586-P133-D-J

NexGen was a company that became victim of the wild processor wars of the 1990′s.  It was bought out by AMD which used its designs as the basis of the very popular and successful AMD K6.  Here is a very uncommon 133 (rated) without FPU.  Later they made a version with an integrated FPU.

ZoranZR36762PQC-Turbo186

And to get all the way to ‘Z’ we shall go to the Zoran ZR36762.  Its a DVD controller SoC, with Dolby Digital support.  Not something one sees and thinks of as a processor.  However at its core, even in 2004, it is not an ARM, its not a MIPs, its a high speed (67MHz) Turbo186, the same 186 architecture Intel released in 1982, still being used, albeit in CMOS.

In the next few days I’ll post some EPROM highlights, then some GPU highlights.  2013 is already off to a great start with new chips coming in each week.

August 30th, 2012 ~ by admin

“We are hitting the limits of physics in many cases” – IBM zEC12 5.5GHz

z12 MCM Layout

“We are hitting the limits of physics in many cases”  These words, spoken by an IBM engineer about the new zEnterprise EC15 mainframe do well to describe the processor that runs it.  The z12, as we’ll refer to this processor, replaces the z196 as IBM’s top performer.  The z196 ran at a slothly 5.2GHz, the fastest commercial processor in the world until now.  The z12 runs at 5.5GHz and was designed to be clocked up to 6GHz.  It is made on a 13layer 32 nm High-K process (the z196 was made on a 45nm process).  This allowed a doubling of logic and cache density.

The EC12 is designed  with single thread performance in mind.  While many systems today focus on massive parallelism, and optimizing code for multi-threading, some tasks do not work well that way, data analytics, batch processing etc, are fundamentally serial processes, so less cores, and more speed per core is far more important.  The z12 is based on a MCM (Multi-chip module) that contains 6 Processing Units (PUs) and 2 Storage Controllers (SC, which contain 196MB of L4 cache each) for a total of 8 dies on each MCM.  Each PU contains 4, 5 or 6 active cores.  The MCM is a 103-layer glass ceramic substrate (size is 96 x 96 mm) containing eight chip sites and 7356 land grid array (LGA) connections.

IBM zEC12 6-core PU – 2.75 Billion Transitors – 5.5GHz

Each PU chip has 2.75 billion transistors. Each one of the six cores has its own L1 cache with 64 KB for instructions and 96 KB for data. Next to each core resides its private L2 cache, with 1 MB for instructions and 1 MB for data respectively.

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