On April 25th, 1961 Robert Noyce, then working at Farichild Semiconductor, received Patent 2,981,877 SEMICONDUCTOR DEVICE-AND-LEAD STRUCTURE.  This was the patent for how to make integrated circuits, containing multiple silicon based transistors, on a single die.  Six months prior Jack Kilby received a similar patent, but for geranium based devices.  Silicon became, for a variety of reasons, the preferred material and 50 years later we now use some of the same principles to build IC’s with over a billion transistors on them. The diagram in the patent showed a device with 8 components on a single doe, 1 transistor, 2 diodes, 2 capacitors, and 3 resistors.

In 1968 Noyce, and Gordon Moore (of Moore’s Law fame) left Fairchild and founded Intel. Fairchild Semiconductor was the ‘incubator’ of many such semiconductor companies, Intersil, Teledyne, Xicor and AMD were all founded by former Fairchild employees

RCA 1802E Die - 20x magnification - Visual6502.org

The talent at Visual6502.org continues.  After imaging and building a complete simulator for the MOS 6502 they did the same for the Motorola 6800 (from which the 6502 was based).

We have sent Visual6502.org several chips and they have now imaged the RCA 1802 that we sent.  What is very interesting is how little marking are on the die, the only that I could see was the number ‘10824.’  This particular chip was dated early 1981 though the 1802 COSMAC was designed in 1976 and was one of the first CMOS microprocessors.  The 1802 had around 5000 transistors (Visual6502 will let us know exactly how many once they are done, and of course what each and every one of them does). For higher res shots and more info see here

Commodore USA has started taking pre-orders of its newly revamped Commodore 64 Home Entertainment system.   Of course this version comes with Blu-Ray and a dual core Intel (gasp!) processor running a version of Ubuntu Linux, it will include a Commodore OS 1.0 emulator, which should run all your favorite C64 6502 based games.

Commodore USA C64 - 1.8 Dual core Atom - 2GB RAM

The Original C64 had 64k of RAM, the Intel Atom D525 has 112k of just L1 cache.  At least the die size is similar :).
Commodore USA is also making modern version of the VIC computers for your enjoyment, albeit in slightly modified cases.

Technologizer has published a very interesting article on Osborne Computers, and its founder, Adam Osborne.  Osborne computers was started 30 years ago (April 3rd 1981).  They were the fastest growing, and fastest failing company in Silicon Valley, impressive even today. Adam Osborne was one of the most important people in Silicon Valley (along with Bill Gates and Steve Jobs).  His books in the 70’s are still invaluable resources for collectors, I have several editions of ‘An Introduction to Microcomputers’ which provide an invaluable reference to some of the chip designs of the 1970’s and early 1980’s.

The Osborne 1, the first wildly successful portable, was based on a Zilog Z80A processor and ran the then popular CP/M OS.  If it wasn’t for cash flow problems, Osborne computers may very well have still been making computers today.  It is also interesting that Mr. Osborne had a habit of picking designs that ended up to be not very successful (he chose the Zilog Z8000 and Intel 8089 I/O processor as ‘Chips of the Year’ in 1980)

In 1974 Monolithic Memories Inc. (MMI) announced the 6701 bit slice device.  At its heart the 6701 is a 4-bit ALU much like the 74181 TTL IC.  The 6701 adds a register, and some other support circuitry on chip making it much more adaptable.  The 6701 has an approximate complexity of 1000 gates (meaning it would replace 1000 gates worth of TTL).  The 6701 was made on a bipolar process and ran at 5.2MHz.  Later versions would up this speed to around 11MHz.

6701D - 1976

The 6701 continues on until around 1980 by which time the AMD 2901 bit-slice processor had come to completely dominate the market.  The Soviets however cloned/modified the 6701 as the 1802VS1 through the 80’s and into the 1990’s.

Its fairly common for a manufacturer to make several devices out of a single actual die.  Just disable part of the die, whether because its faulty, or not needed, or simply do not connect the pins to that feature.  Intel did this a lot with the Celeron, and PIII line, disable some L2 cache on a PIII and you get a Celeron.  Today it is done with multi-core processors.

TI TMS320E17JDL

Using a common wafer for several products saves a large amount of money, no need for a second mask set, and testing systems.  Here we have a Texas Instruments TMS320E17JDL.  The TMS320 is the industry standard in DSPs (Digital Signal Processors). The E17  from 1990 runs at 20.5MHz has a 4K EPROM, 256 bytes of RAM, and a pair of serial ports.  You can see the large sections of the die devoted to the ROM, RAM, and MAC (Multiply and Accumulate).

TI TMS320E15JDL

This is the TI TMS320E15JDL.  It is the same basic DSP core as the E17, it includes the same 4K EPROM, the same 256 bytes of RAM and the same MAC unit.  It has some I/O ports tasked with doing different things, but thats a relatively minor difference.  The big difference is the E15 lacks the 2 serial ports of the E17.  You can see on the die where that hardware does not exist, its a large black spot, void of any circuitry.  A very interesting and unusual occurrence.

TI either used a completely different mask for the E15, or they simply chose to not expose that small part of the mask.

Now the UBM Techinsights and iFixIt have completed their teardowns of the iPad 2, and benchmarks have been run we now know that the A5 is in fact a dual core, made by Samsung, and clocked at around 900MHz.  It also includes the PowerVR 543 dual core GPU as we suspected in our previous post.

Apple A5 Processor

Also we now have an actual image of the chip, rather then the photoshopped one Apple used in their presentation.

National Semiconductor NS87P50D-11

National Semiconductor NS87P50R-6

In the 1980’s most high-volume microcontrollers were OTP (one-time-programmable) or were factory programmed (Mask ROM).  This made developing code for them a bit tricky.  Some companies made lower volume version with an onboard EPROM, such as the Intel 8751.  Other designs this was not practical so another solution had to be found.

The most common solution became the ‘piggyback’ package.  The CPU would reside on a ceramic (pictured on the left) or organic (on the right) package that had a socket on top of it for an EPROM.  This provided an easy way to develop code for the processor, and EPROMs could be stopped out and erased at will.  Obviously these ‘piggyback’ parts were not intended for production use, their cost would be much to high for that.  They were made in relatively small quantities solely for engineering and prototype work.

This National Semiconductor NS87P50R-6 is a 6MHz MCU.  It includes a 24-pin socket on top that supports up to a 32k EPROM (2758, 2716 or 2732).  The other group of 4 pins on top are yet another feature.  It would be cost prohibitive to make a separate development device for each member of the MCU family so the 87P50 can be told to emulate several.  It can emulate a 8048, 8049, or if all jumpers are removed, the 8050. (The only difference in these is the RAM size, 64bytes, 128bytes, or 256bytes for the 8050).  The NS87P50R-6 is in an organic package, the die is actually placed directly on a circuit board, and covered in a black epoxy.  This is rather less expensive then the NS87P50D-11 ceramic and gold version, though is not as tolerant to heat.

If you have ever taken apart a cheap consumer electronic device, you will likely find a black ‘blob’ on the circuit board.  Thats a die, and usually the microcontroller of that device.  ID’ing it is next to impossible without acid and a microscope however.

National Semiconductor was not the only company to use this type of design.  Zilog and Synertek used it for the Z8 series, Hitachi for the HD6301, Mostek for the 3870 and most all other companies that made a MCU int he 1980’s.

Andrew Tait decided to see if an install of Microsoft’s original Windows, could be upgraded through each version to end up at the current version.  Its amazing that yes it worked, and that Windows 3 programs continued to work in Windows 7.

Perhaps even more remarkable, is that Windows 1 was deigned to run on an 8086 processor, clocked at 4.77MHz with 256k of RAM. Using VM Ware it can still be run on modern hardware.

A parting thought…The entire Windows 1 OS will fit in the L2 cache of any modern processor.

Apple A5 - Actually a Photoshop'd A4

Today Apple announced the iPad 2, which unless you are living in a cave, you likely have heard about more then you wish already.  The iPad 2 debuts the next evolution in Apples own ARM processor.  The A4 (which was a single core 1GHz class ARM Cortex-A8 made by Samsung) is out, and a dual core replacement is in.  Details are thin until a proper tear down is done, but it is most likely a 1GHz dual core ARM Cortex-A9 with a dual core PowerVR 543 replacing the single core PowerVR 535.  It is most likely fab’d again by Samsung.  Apple’s press shot during their presentation is NOT an A5, the PR folks at Apple simply Photoshopped the original press shot of the A4 from last year. Note the date codes on the chip are 0939 and 0940 (sine their is 2 dies in it), which is late 2009.

Apple also made the somewhat deceptive remark that the iPad 2 is the first dual core tablet to ship ‘in volume.’  HP’s Touchpad runs a dual core Snapdragon and is shipping ‘soon.’  LG is shipping their tablet this month with a very capable Tegra 2, and Samsung will follow with the Galaxy Tab 10.1, also Tegra 2 powered.  RIM’s Playbook which is in beta, used a TI OMAP 4430 dual core Cortex-A9.  This puts Apple right in the mix of the dual core frenzy that will playout this year.

Apple A4 Press shot, notice the identical markings to the A5

We’ll update the photo as soon as someone (likely the folks at iFixIt) get and tear one down.