Archive for the 'Processor News' Category

July 3rd, 2016 ~ by admin

Juno Joins Jupiter: And Brings Some Computers For The Trip

Juno - RAD750 Powered Mission to Jupiter

Juno – RAD750 Powered Mission to Jupiter

NASA’s Juno mission to Jupiter arrives in just about a day, after a 5 year journey that began in August of 2011 aboard an Atlas V rocket.  The Juno mission is primarily concerned with studying the magnetic fields, particles, and structure of Jupiter.  Finding out how Jupiter works, and what its core is made of are some of Juno’s goals.  None of the experiments need a camera, but NASA decided, in the interest of public outreach and education, that if you are going to spend $1 billion to send a probe to Jupiter, it probably should have a camera.  Energetic particle detectors, Magnetometers, and Auroral Mappers are great for science, but what the public is inspired by is pretty pictures of wild and distant worlds.

Juno is powered by a now familiar computer, the BAE RAD750 PowerPC radiation hardened computer.  It operates at up to 200MHz (about the processing power of a mid 1990’s Apple Computer) and includes 256MB of Flash memory and 128MB of DRAM.  It (and the other electronics) are encased in a 1cm thick titanium radiation vault.  Flying in a polar orbit around Jupiter, Juno will experience intense radiation and magnetic fields.  The probe is expected to encounter radiation levels in the order of 10Mrads+.  The vault limits this to 25krads, within what the electronics can handle.  It should be noted that a dose of 10krads is fatal in most cases.  This intense of radiation will degrade the prober, even with shielding, resulting in a mission life of only 37 orbits (a little over a year) before the probe will be gracefully crashed into Jupiter.

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June 21st, 2016 ~ by admin

Fujitsu to take ARM into the realm of Super

Fujitsu MB86900 - Original SPARC Processor from 1987

Fujitsu MB86900 – Original SPARC Processor from 1987 – 14.28MHz

Back in 1987 Fujitsu was one of the founders of the SPARC RISC architecture.  The very first SPARC processors were built by Fujitsu, and used in their servers through the 1990’s and 2000’s. SPARC processors were first used in the CM-5 Thinking Machine in 1991 using 1024 SPARC processors (later upgraded to SuperSPARCs).  Fujitsu began making supercomputers based on SPARC in 1992 with the AP1000 and its UltraSPARC based successor the AP3000.  One of their latest, the K machine, is a 705,024 core 12MW SPARC64 VIIIfx based design that ranks as #5 on the Top 500 Supercomputer list.

This is why its a surprise to many that they have announced the successor to the K Machine will be similar in topology, and will be RISC based, but will not be SPARC based, rather Fujitsu has been working with another well known RISC architecture with serious HPC aspirations, ARM.  Fujitsu has been an ARM architecture license holder for some time and the post-K machine will be based on the 64-bit ARMv8 architecture.  ARM has been working hard to make their chips appeal to the datacenter environment, with some success.  Their low power consumption makes them ideal for high density applications, which a super computer needs.  Estimated performance is 1,000 Peta FLOPS and it is due to go into service in 2020. A speed that would eclipse another recently announced RISC supercomputer….

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February 3rd, 2016 ~ by admin

The End of the Omega

ST STi5500 - The Original 50MHz Transputer based Omega

ST STi5500 – The Original 50MHz Transputer based Omega

In January ST announced that they would be exiting the Digital Set Top Box (STB) market.  This is a market that they arguably led for the last 20 years, and one that really began with their Omega processor in 1997. The ST Omega processor line, beginning with the STi5500 powered set top boxes, for cable companies, satellite companies, and DVR’s as well as other TV connected devices.  Open up a satellite TV receiver from the last 20 years and you are very likely to find a STi Omega chipset.

The STi5500 was the beginning, and interestingly at its core was a ST20 processor, based on the Inmos Transputer (which ST now owned) from the late 1980’s.  The Transputer was meant to revolutionize computing, making processors so cheap, that they could be embedded into pretty much any other logic device, what today we call an SoC, but in 1985, was a novel idea.  At the time it didn’t really succeed, but ended up seeing its intended use 10+ years later in the Omega.  In the 1980s the Transputer saw speeds of up to 30MHz, int he STi5500 it ran at 50MHz with 2K of I-cache + 2K of Data Cache as well as 2K of SRAM that could be used as data cache.

ST STi5514 - Enhanced 180MHz Omega

ST STi5514 – Enhanced 180MHz Omega

In the early 2000s the Omega was upgraded to a faster ST20 core, eventually hitting 243MHz in the STi5100, now with the caches increased to 8K each, as well as 8K of SRAM.  This was getting to be the limit of the ST20 Transputer core.  ST needed a core that could support higher speeds running such things as Java and Windows CE amongst other things, as well as support the higher resolutions and audio quality requirements.

ST handled this is in two entirely different ways.  First they licensed the SH-4 32-bit RISC core from Hitachi, a rather surprising move but STBs was not a market Hitachi was in, so it was in both companies best interest.  ST also was working on their own new core to replace the ST20, and they had help, from a very surprising partner.

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January 21st, 2016 ~ by admin

Microchip PIC’s up Atmel

Microchip PIC16C62 ENG SAMPLE - 1989

Microchip PIC16C62 ENG SAMPLE – 1989

Yesterday Microchip, makers of the PIC line of microcontrollers, announced they were buying Atmel, for a cool $3.56 Billion.  This isn’t entirely surprising considering the ongoing consolidation in the industry, It was only last year that Dialog attempted to purchase Atmel, and before that ON Semiconductor and Microchip. In December of 2015 NXP and Freescale (formerly Motorola Semiconductors) merged, creating one of the largest microelectronics companies.  These mergers do create an interesting result, product mixes that were formerly competitors, end up being marketed side by side.  In the case of NXP and Freescale, NXP marketed many MCS-51 microcontrollers in their 8/16-bit lines, while Freescale of course sold many versions of MC6800 based MCU’s.  These two rivalries have existed since the early 1980’s and likely will continue.  Perhaps the biggest rivalry in MCU though is between Atmel and Microchip.

Atmel EPROM, fab'd by GI in 1986, right before they became Microchip

Atmel EPROM, fab’d by GI in 1986, right before they became Microchip

Microchip was spun off of General Instrument in 1987, but the PIC architecture dates back to 1976, and is still being made in nearly the same form (PIC16C55).  Atmel was started in 1984, first making EPROMs, and then MCS-51 microcontrollers, one of the very first companies to make an 8051 with on die flash memory.  In a bit of a twist of fate, when Atmel started, it was a fabless company, it contracted with several companies to make its EPROMs, including Sanyo, and General Instruments, which as mentioned above, became Microchip.  Atmel also makes APRC processors, and for a time made Motorola products as well (Atmel has a very convoluted history, for more info on this read here and here )

Today the PIC line continues to be popular, with devices for the low end, such as the PIC10/12 all the way to the MIPS based PIC24 on the upper end.  Atmel continues to make 8051 MCUs, but also makes the 8 and 32-bit AVR line, perhaps best known today for its use in Arduino boards.  They also make MCU’s based on the ARM core, a competitor to MIPS, and Atmel’s own AVR32.

Likely to the consternation to many fans of either company, this merger does make sense, more so than ON or Dialog buying Atmel.  While Microchip and Atmel both compete in the same markets, they do so with different architectures.  Product lines are unlikely to change, and overhead saving should free up $$ both for stockholders (yawn) and engineering teams alike. No word has been giving yet on wether Microchip intends to keep the Atmel branding, but perhaps they should, as an AVR MCU with a Microchip logo on it may just prove to be too much for some.

April 9th, 2015 ~ by admin

The e2v PowerPC and HiTCE Packages

Atmel PC7410MGH450LE - Motorola Marked Package

Atmel PC7410MGH450LE – Motorola Marked Package – 2003

In the 1970’s second sources were quite important in the processor industry.  They provided a stable supply of a designed in part if the primary manufacturer (which often only had a fab or 2) had problems.  They also could widen the market for the processor.  Many of these agreements were kept active for decades after, resulting in some interesting results.

Motorola licensed many of their design to SGS, which later merged with Thomson to become STMicroelectronics. though the Thomson name was still used.  Thomson license built most of Motorola’s product line, as well as many high reliability versions.  In 1999 Atmel bought Thomson-CSF Semiconductors, and continued to make Motorola products (in their Grenoble France fab), which now included Motorola’s PowerPC line as well as the 68k line of processors.  This portion of Atmel was sold to e2v (in England) in 2006, which continued to produce the Motorola (now spun off as Freescale) PowerPC line, now branded as e2V.

The packaging used by e2v (and previously Atmel) is the same as that used by Motorola/Freescale.  The packages were custom made for Motorola/Freescale by Kyocera (and others) and so often chips with both Atmel/Motorola and e2v/Freescale markings can be found.  It is this packaging that is of interest, as it shows an interesting aspect of processor design.

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March 11th, 2015 ~ by admin

Emulating the Intel 8080 on a MOS 6502 has in interesting post about emulators, specifically one created in 1978 to run Intel 8080 code on a 6502.  While emulators today are fairly common, such as running Nintendo (6502) games on a PC, or In Circuit Emulators for development, an 8-bit cross architecture emulator is certainly different.  Especially since the 8080 and 6502 were so vastly differing.  Certainly a useful tool for teaching oneself a new architecture, and as they were coming out rather rapidly in the 1970’s knowing more then one was a worthy investment.

Todays equivalent perhaps would be emulating a PIC on a 8051.  Perhaps someone will give it a try?

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Processor News

March 6th, 2015 ~ by admin

Dawn to Ceres: Processors for the Protoplanet

Dawn's mission: Ceres

Dawn’s mission: Ceres

Dawn was launched in 2007 by NASA/JPL and was built by Orbital Sciences becoming their first interplanetary spacecraft.  Dawns mission was to visit the two largest dwarf planets in the Asteroid belt, Vesta and Ceres.  After visiting Vesta for over a year in 2011-2012 Dawn used its ion engines to break orbit, and travel to Ceres, a journey of 2.5 years.

In the next few hours Dawn will be captured by Ceres gravity and begin orbiting it.  These protoplanets, are very interesting scientifically as they provide a look into our solar systems past.  Dawn will orbit Ceres for several years and perhaps discover what the mysterious bright spots are, among other things.  Studying a planet, even a dwarf planet, requires processing power, and for that Dawn is well equipped.

Dawn is solar powered, so power budgets are of great concern.  At 3AU (three times further from the sun then Earth) Dawns solar panels are rates at about 1300 Watts.  This has to run all the science experiments, the main computers, the comms, and most importantly the electric ion engine, which uses electricity generated from the panels to excite and eject Xenon gas at very high velocities.  Thus, power consumption is more important then raw processor power here, especially for the systems that are on most of the time.

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November 15th, 2014 ~ by admin

Apple A8X Processor: What does an X get you?

Anandtech has an excellent article on the new Apple A8X processor that powers the iPad Air 2.  This is an interesting processor for Apple, but perhaps more interesting is its use, and the reasoning for it.  Like the A5X and A6X before it (there was no A7X) it is an upgrade/enhancement from the A8 it is based on.  In the A5X the CPU was moved from a single core to a dual core and the GPU was increased from a dual core PowerVR SGX543MP2 to a quad-core PowerVR SGX543MP4.  The A6X kept the same dual core CPU design as the A6 but went from a tri-core SGX543MP3 to a quad core SGX554MP4.  Clock speeds were increased in the A5X and A6X over the A5 and A6 respectively.

The A8X continues on this track.  The A8X adds a third CPU core, and doubles the GX6450 GPU cores to 8.  This is interesting as Imagination Technologies (whom the GPUs are licensed from) doesn’t officially support or provide an octa-core GPU.  Apple;s license with Imagination clearly allows customization though.  This is similar to the ARM Architecture license that they have.  They are not restricted to off the shelf ARM, or Imagination cores, they have free reign to design/customize the CPU and GPU cores.  This type of licensing is more expensive, but it allows much greater flexibility.

This brings us to the why.  The A8X is the processor the the newly released iPad Air 2, the previous iPad air ran an A7, which wasn’t a particularly bad processor.  The iPad Air 2 has basically the same spec’s as the previous model, importantly the screen resolution is the same and no significantly processor intense features were added.

When Apple moved from the iPad 2 to the iPad (third gen) they doubled the pixel density, so it made sense for the A5X to have additional CPU and GPU cores to handle the significantly increased amount of processing for that screen. Moving from the A7 to the A8 in the iPad Air 2 would make clear sense from a battery life point of view as well, the new Air has a much smaller batter so battery life must be enhanced, which is something Apple worked very hard on with the A8.  Moving to the A8X, as well as doubling the RAM though doesn’t tell us that Apple was only concerned about battery life (though surely the A8X can turn on/off cores as needed).  Apple clearly felt that the iPad needed a significant performance boost as well, and by all reports the Air 2 is stunningly fast.

It does beg the question though? What else may Apple have in store for such a powerful SoC?

November 12th, 2014 ~ by admin

Here comes Philae! Powered by an RTX2010

Comet 67P/Churyumov–Gerasimenko - Soon to have a pair of Harris RTX2010 Processors

Comet 67P/Churyumov–Gerasimenko – Soon to have a pair of Harris RTX2010 Processors

In less then an hour (11/12/2014 @ approx 0835 GMT) 511,000,000 km from Earth the Philae lander of the Rosetta mission will detach and begin its decent to a comets surface.  The orbiter is powered by a 1750A processor by Dynex (as we previously discussed).  The lander is powered by two 8MHz Harris RTX2010 16-bit stack processors, again a design dating back to the 1980’s.  These are used by the Philae CDMS (COmmand and Data Management System) to control all aspects of the lander.

All lander functions have to be pre programmed and executed by the CDMS with absolute fault tolerance as communications to Earth take over 28 minutes one way.  The pair of RTX2010s run in a hot redundant set up, where one board (Data Processing Unit) runs as the primary, while the second monitors it, ready to take over if any anomaly is detected.  The backup has been well tested as on each power cycle of Philae the backup computer has started, then handed control over to the primary.  This technically is an anomaly, as the CDMS was not programmed to do so, but due to some unknown cause it is working in such a state.  The fault tolerant programming handles such a situation gracefully and it will have no effect on Philae’s mission.

Why was the RTX2010 chosen?  Simply put the RTX2010 is the lowest power budget processor available that is radiation hardened, and powerful enough to handle the complex landing procedure.  Philae runs on batteries for the first phase of its mission (later it will switch to solar/back up batteries) so the power budget is critical.  The RTX2010 is a Forth based stack processor which allows for very efficient coding, again useful for a low power budget.

Eight of the instruments are also powered by a RTX2010s, making 10 total (running at between 8-10MHz).  The lander also includes an Analog Devices ADSP-21020 and a pair of 80C3x microcontrollers as well as multiple FPGAs.


October 15th, 2014 ~ by admin

Has the FDIV bug met its match? Enter the Intel FSIN bug

Intel A80501-60 SX753 - Early 1993 containing the FDIV bug

Intel A80501-60 SX753 – Early 1993 containing the FDIV bug

In 1994 Intel had a bit of an issue.  The newly released Pentium processor, replacement for the now 5 year old i486 had a bit of a problem, it couldn’t properly compute floating point division in some cases.  The FDIV instructions on the Pentium used a lookup table (Programmable Logic Array) to speed calculation.  This PLA had 1066 entries, which were mostly correct except 5 out of the 1066 did not get written to the PLA due to a programming error, so any calculation that hit one of those 5 cells, would result in an erroneous result.  A fairly significant error but not at all uncommon, bugs in processors are fairly common.  They are found, documented as errata, and if serious enough, and practical, fixed in the next silicon revision.

What made the FDIV infamous was, in the terms of the 21st century, it went viral.  The media, who really had little understanding of such things, caught wind and reported it as if it was the end of computing.  Intel was forced to enact a lifetime replacement program for effected chips.  Now the FDIV bug is the stuff of computer history, a lesson in bad PR more then bad silicon.

Current Intel processors also suffer from bad math, though in this case its the FSIN (and FCOS) instructions.  these instructions calculate the sine of float point numbers.  The big problem here is Intel’s documentation says the instruction is nearly perfect over a VERY wide range of inputs.  It turns out, according to extensive research by Bruce Dawson, of Google, to be very inaccurate, and not just for a limited set of inputs.

Interestingly the root of the cause is another look-up table, in this case the hard coded value of pi, which Intel, for whatever reason, limited to just 66-bits. a value much too inaccurate for an 80-bit FPU.