April 13th, 2017 ~ by admin

Zycad: Emulating Hardware on Hardware

Zycad IU – Interface Control Processor for the XP series of Emulators. Fab’d by LSI in 1990

Zycad was founded in 1981 to develop and market simulation acceleration technology.  This was to allow new chip designs to be tested/simulated before being laid out in silicon, providing the possibility to catch faults earlier in the design process.  The earlier faults can be caught, the easier, and less expensive they are to fix.

By the late 1980’s Zycad a leader in simulation tech and set the standard for simulation systems.  They provided the simulation software environment, a simulation/hardware descriptive language (Zycad Intermediate Format), as well as custom hardware accelerators for the logic/fault simulation.

In 1987 Zycad shipped a customized system to LSI, which LSI was then able to use, and market for all their customer designs, notable the LSI version of the SPARC processor.  This close relationship with LSI also benefited Zycad, as it was LSI who fab’d Zycad’s custom silicon, the heart of their emulation system. In the late 80’s and early 90’s the main Zycad emulation system was the XP series.  The XP series (consisting of the 100, 140 and 200) was based on 2 main IC’s.  The Interface Control Processor (IU) was the interface between the host processor (either a SPARC system, or a VAX type workstation) and the Logic/Fault Emulation Processors (PU’s).  One IU could control multiple PU’s and a typical system (such as the XP-140) had 1 IU and 5 PU’s.  These systems could emulate from 256,000 (XP-100) to 4 million (XP-200) gates at speeds from 2.5 millions events/sec to 40 million events/sec.

Zycad XP-140 system board with 1x IU and 5x PU Emulation processors

In 1996 Zycad announced the Lightspeed simulation server, massively parallel simulation server running on from 64-4096 processors, each with their own on chip memory.  These were implemented on 0.5u ASICs from LSI.  This technology was sold later that year to one of Zycad’s competitors, IKOS, leaving Zycad to enter the field of FPGAs as Gatefield, which later would be bought out by Actel.  IKOS was later acquired by Mentor Graphics, a company that worked extensively with Zycad and their emulators in the 1980’s and 1990’s.  The customer, had now become the owner.

What Zycad began in the 1980’s continues today on a massive scale.  The XP series and the later Lightspeed simulation server are in many ways similar to the Palladium and Palladium II processors by Quickturn/Cadence that we discussed lat year.

Hardware simulation is a field that continues to grow in scale and complexity.  As systems become more and more complex, transistors counts continue to rise, and the need to make sure it works, before putting it in silicon remains.

December 3rd, 2012 ~ by admin

GPU of the Day: SGI GE7 Geometry Engine

SGI Extreme 4GE7MCM 256 MFLOPS 320,000 Gates

At 2.6oz (75 grams) and 2.25 inches square (6cm) the SGI 4GE7MCM is a beast of a graphics chip.  More properly called a Geometry Engine was, the GE7 was responsible for all the graphics processing in SGI Indigo2 workstations.  The Indigo2 Extreme graphics option consisted of a pair of these MCMs (Multi-Chip-Module).  Each one contains 4 GE7 Geometry Engines providing 32MFLOPS of performance each.  Each GE7 consists of a custom 80,000 gate array from LSI (for a total of 320,000 gates and 128MFLOPS per MCM).  This performance level was, ironically, better then the main system CPU (35MFLOPs for the 200MHz R4400 option).

Each of the black ‘caps’ on the chip covers a single GE7 Engine.  A similar design was used for the XZ Graphics system that had only 4 total GE7 cores.  This was either implemented with 2 of the large MCMs that had only 2 GE7s in them (same package however) that were marked 2GE7MCM, or, later, a single surface mount MCM containing 4 GE7 engines.  All were manufactured by LSI.  In total the Extreme Graphics subsystem had no less then 31 custom gate arrays from LSI for a total of over 1.2 million gates.   At an average of 2 transistors per gate that works out to around 2.5 million transistors, a considerable amount for a graphics system in 1993.  Today’s graphics chips pack in transistors numbering in the billions, the Geforce GTX 680 has a total of 3.54 billion transistors, and performance measured in TFLOPS, again for the GTX 680, 3.09TFLOPS.  Today’s graphics chips cannot, however, compete with the magnificent looks of the GE7’s giant MCM package.

Sources:
Indigo2 Product Guide (PDF)
Indigo2 Technical Report 

 

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January 20th, 2009 ~ by admin

Processor of the day..3 ARM’s on a chip.

LSI developped their Fuision-MPT line of SCSI controller (U320 and fibre channel) back in 2001.  Well before ‘dual core cpus’ hit mainstream.  Continuing from the last post, and found on the same PowerEdge motherboard is an LSI53C1030 Fusion-MPT SCSI controller.  This one was made in 2004, and has not one, nor two, but THREE ARM966E-S 32bit cores on it.

Fusion-MPT ARM9 Tri-core by LSI

Fusion-MPT ARM9 Tri-core by LSI

No idea of the clock speed of the cores, but at 0.18u the cores are good for 200MHz and 250MHz at 0.13u.  The chips system clock is sourced by an 80MHz