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NEC Electronics Launches High-Performance VR5400 Processor Family for Embedded Applications

 

Feature-Rich Architecture with Low Power Consumption

 

Santa Clara, CA (March 9, 1998)

NEC Electronics Inc. today announced the VR5400™ family of 64-bit MIPS® RISC microprocessors, one of the most powerful processor architectures ever designed specifically for embedded applications. The new family of processors includes such advanced features as dual-issue superscalar architecture, multimedia extensions, floating-point capability, a 64KB on-chip cache and a 64-bit data bus. The VR5400 family will initially be available in three versions: the VR5464™ processor, available in 250MHz and 200MHz versions, and the 167MHz VR5432™ device.

An N-Wire™ on-chip debugging port on the new processors simplifies programming and speeds system development. The VR5400 family also will ship with development tool and real-time operating system (RTOS) support, along with chipsets for a variety of applications.

Designed by NEC Electronics’ advanced microprocessor development team and based on NEC’s advanced 0.25-micron (drawn, 0.18-effective) process, the VR5400 processor family operates at high-performance rates of 519 Dhrystone MIPS at 250MHz, 415 MIPS at 200MHz and 347 Dhrystone MIPS at 167MHz, with a low maximum power consumption of 2.5 to 4.4 watts.

At $45 for the 167MHz VR5432 microprocessor, $75 for the 200MHz VR5464 processor and $95 for the 250MHz VR5464 device in 10,000-unit quantities, the VR5400 family of processors delivers excellent performance at an attractive price for embedded applications in office automation, internetworking and consumer electronics.

“Our customers told us they were looking for high-performance, well-priced processors designed specifically for embedded applications,” said Ray Newstead, NEC Electronics general manager of VR Micro and Windows® CE Products. “NEC Electronics heard what they had to say, and working closely with our customers, created a new-generation, optimized embedded processor family in less than 16 months. This fast turnaround time, which gives our customers access to extremely cost-effective high-performance processor technology, is largely unprecedented in this marketplace.”

“The advantage of working directly with customers using a ‘clean sheet’ design approach on the VR5400 family gave NEC maximum flexibility in implementing specific features to address our customers’ requirements,” said Michael Ngo, project manager for NEC Electronics Inc. “Leveraging advanced process technology with innovative design techniques allowed NEC to achieve higher clock frequency while keeping power consumption low. The VR5400 family will enable a new level of performance for the embedded market.”

Office automation applications targeted by the VR5400 family include advanced laser and color laser printers and multifunction peripherals combining scanning, printing and fax capabilities. The high performance offered by the VR5400 family also makes it a compelling choice for internetworking devices such as routers, switches and backoffice equipment, and for advanced consumer products such as set-top boxes, digital converters and digital televisions.

The VR5400 family is also ideal for embedded applications developed using the MIPS-IV instruction set or currently using the NEC VR5000™ processor. Although they are from an entirely new processor family, VR5400 processors are designed to be compatible with applications developed around the existing VR5000 device.

 

About the VR5400

The VR5400 family processors, designed around a dual-issue superscalar architecture to maximize instruction issue rate, are capable of issuing an average of 1.7 instructions per cycle.

The new devices include two symmetrical pipeline control and execution units capable of executing any combination of integer and floating-point instructions. Dual-issue superscalar architecture is an advanced design rarely found in processors costing less than $1,000.

The new processors contain six independent execution units, including two unified integer/floating-point units, a nonblocking load/store unit, a high-performance 32x32 multiply-accumulate unit, a vector unit supporting 8x8 single instruction multiple data (SIMD) operations and a branch unit. Multiple execution units are used to ensure smooth, continuous execution of programs.

The multiply-accumulate unit of the VR5400 devices provides digital signal processor (DSP) functionality, allowing the processors to provide audio and modem capability.

Multimedia extensions are also included in the VR5400 devices, in the form of a vector processing unit for graphics and imaging manipulation applications. The vector unit enables graphics and image handling capabilities integrated into the processor.

The new family of devices also incorporates a 64-bit barrel shifter for enhanced performance. This feature provides the capability to rotate a data word (or doubleword) left/right in one-cycle rotate operations.

The VR5400 family is designed for very low power consumption, CPU core running at 2.5V and 3.3V input/output (I/O) interface. Power usage for the VR5400 family ranges between 2.5 and 4.4 watts. The static core of the VR5400 device also makes this design highly portable, permitting the use of one CPU core for many processor designs such as different speed grades, different process technologies and other designs such as application-specific standard products (ASSPs).

An on-chip 64KB primary cache (32KB instruction, 32KB data) offers faster access to frequently used operations and data. The cache is two-way set associative and supports a number of special features, including cache line locking and cache prefetch. Cache line locking allows users to lock in critical codes to ensure deterministic response time in interrupt handling routines and to lock in critical data to eliminate memory latency. Data prefetch (a nonblocking operation) fills the desired data cache lines with information to be used by the processor, hiding memory latency and improving the cache hit rate for better overall system performance. Both write-back and write-through cache protocols in the data cache are also supported.

Memory is managed in the VR5400 family by the built-in memory management unit (MMU), which supports address translation, facilitates exception processing and manages operating modes. Fully software compatible with the existing VR5000 processor, the MMU supports 36-bit physical and 64-bit virtual addresses and variable page sizes of 4KB, 16KB, 64KB, 256KB, 1MB and 16MB.

The VR5400 family is designed to provide full floating-point capability at no additional cost, as the floating-point unit (FPU) shares resources with the integer data paths. The FPU is fully compliant with the IEEE-754 FP standard, supporting both single- and double-precision floating-point operations.

All members of the VR5400 processor family have an internal 64-bit bus. The VR5464 processors have a 64-bit external bus for maximum performance, while the lower-cost VR5432 processor has a 32-bit external bus.

VR5400 family processors have a built-in N-Wire debugging port that, by giving full access to processor internal states and full run control, can simplify the software development process and thus permit products to get to market faster.

The MIPS-IV Instruction Set Architecture is supported by the VR5400 family, with added instructions for embedded applications designed to improve code density, reduce system memory and otherwise enhance functionality. These added capabilities include conditional moves, indexed load/store instructions, data prefetch option, cache line locking, a fused multiply-add function, which offers DSP support, and additional register-based multiply instructions.

 

VR5400 Products

Designed as a performance solution, the VR5464 processor is available in two versions: a 200MHz version offering 415 Dhrystone MIPS performance, and a 250MHz version providing 519 MIPS performance.

The VR5464 processor is ideal for performance-oriented embedded applications such as internetworking routers, switches and backoffice equipment, high-speed network and color

laser printers, and digital video. Packaged in a 272-pin ABGA package, the device is expected to sell for $75 per unit in 10,000-unit quantities for the 200MHz version, and $95 per unit in 10,000-unit quantities for the 250MHz version. Samples are expected to be available in the second quarter of 1998, with volume production scheduled for the third quarter. Pricing and availability are subject to change.

Providing an outstanding price/performance solution within its price range, the VR5432 processor, with 347 Dhrystone MIPS performance and a maximum of 2.5 watts of power consumption, includes a 32-bit external bus and 64-bit internal bus and multimedia extensions. The VR5432 device is aimed at cost-sensitive embedded applications that demand high performance, such as digital televisions, game consoles, thin client products and lower-cost printers. Packaged in a 208-pin PQFP package, the VR5432 processor is expected to sell for $45 per unit in 10,000-unit quantities. Samples are expected to be available in the third quarter of 1998, with volume production scheduled for the fourth quarter. Pricing and availability are subject to change.

 

VR5400 Development Tools and Evaluation Boards

NEC Electronics offers a comprehensive line of development tools for the VR5400 family. A variety of tools, including compilers, operating systems and debuggers that support the MIPS RISC architecture, is also available from third-party sources.

Multiple tools from leading vendors such as Corelis, Hewlett-Packard, EPI, Cygnus, Algorithmics, Green Hills, Apogee, Wind River Systems, ISI and others will be available to support the VR5400 family. These tools include evaluation boards, logic analyzers, in-circuit emulators (ICEs), compiler tool chains, real-time operating systems and bus models.

Since the VR5400 is instruction set-compatible with the VR5000, prototyping can be initiated immediately, a significant advantage over competitive chips that have been announced, but are not shipping.

 

VR Series Microprocessors

NEC licenses the MIPS RISC technology from the MIPS Group of Silicon Graphics, Inc. to design and manufacture the VR Series™ of high-performance microprocessors. NEC offers a broad line of MIPS-based microprocessors, including the VR4102™, VR4111™, VR4300™, VR4305™, VR4310™, VR5000, VR5432, VR5464 and VR10000™.

In January 1998, NEC’s VR4300 processor was awarded the 1998 Editor’s Choice Award for “Best Embedded Microprocessor” by Microprocessor Report, a leading industry publication.

 

About NEC Electronics Inc.

NEC Electronics Inc., headquartered in Santa Clara, Calif., designs, manufactures and markets an extensive line of electronic products including ASICs, microprocessors and microcontrollers, 3D graphics accelerators, digital signal processors (DSPs), memories and components including flat panel displays and lithium-ion batteries. The company operates a 709,000-square-foot manufacturing facility in Roseville, Calif. NEC Electronics is an affiliate of NEC Corporation (NIPNY), a $41 billion international manufacturer of computer, communications and semiconductor products. For more information about products offered by NEC Electronics Inc., please visit the NEC U.S. website at http://www.nec.com.

 

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NEC, VR Series, VR4102, VR4111, VR4300, VR4305, VR4310, VR5000, VR5400, VR5432, VR5464 and VR10000 are registered trademarks or trademarks of NEC Corporation in the United States and/or other countries. MIPS is a trademark of Silicon Graphics Inc., MIPS Group. N-Wire is a trademark or registered trademark of Hewlett-Packard. Windows and Windows CE are either trademarks or registered trademarks of Microsoft Corporation in the United States and/or other countries. All other trademarks are the property of their respective holders.