LOW COST SUPERSCALAR 32-BIT PROCESSOR CORE

Original Document

LOW COST SUPERSCALAR 32-BIT PROCESSOR CORE

Motorola Announces New Low-Cost, Superscalar 32-bit Processor Core

for High-Performance Embedded Applications

Next Generation ColdFire^TM Core Provides

2.5x Performance Improvement

AUSTIN, Texas -- October 19, 1998 -- Delivering on its roadmap for highly integrated, low-cost solutions for high performance embedded applications, Motorola today announced the latest addition to the ColdFire=AE processor family. The Version Four (V4) ColdFire core provides 2.5x the performance of the Version 3 core, delivering over 200 MIPS, while still maintaining the low-cost methodology that is the hallmark of the ColdFire architecture.

To achieve this level of performance, V4 employs a Harvard architecture and limited superscalar execution within a single pipeline. V4 provides a significant performance increase, a cost-reduced migration path for higher performance 68K system designs, and a future upgrade path for existing ColdFire system designs. A preliminary model of the V4 core has already been deployed to Hewlett-Packard's Integrated Circuit Business Division.

"With the advent of the Version 4 core, the ColdFire family is continuing on its course of providing low-cost, high-performance solutions for a wide array of embedded applications," says Ray Burgess, corporate vice president and general manager, Motorola. "The ColdFire architecture is designed from the ground up as an ideal solution for core-based designs, with over 200 core deployments to date resulting in over $2.5 billion of programs in various stages of design today."

Version 4 Performance

At 150 MHz, the Version 4 core achieves 2.1 - 2.5x the performance of the Version 3 core, resulting in greater than 200 Dhrystone 2.1 MIPS, while still maintaining a small core size (about 4.5 square millimeters when implemented in Version 4 ColdFire Motorola's advanced 0.25 micron CMOS process). By providing high levels of performance and high degrees of customizability, while still maintaining very low system costs, the Version 4 ColdFire architecture continues the family tradition of providing compelling solutions across the 32-bit embedded marketplace.

Most instructions execute in a single clock on Version 4. In addition, V4 uses innovative branch folding and assignment instruction folding techniques, thereby maximizing multiple instruction dispatch within a single pipeline.

This limited superscalar methodology approaches dual-issue performance but at a much lower silicon cost. To sustain this high performance, V4 uses a Harvard architecture which doubles the available bandwidth between the core and on-chip local memories, removes instruction and operand conflicts, and provides more flexibility for configuring on-chip memory.

V4 Enhancements

The V4 core maintains complete upward code compatibility with existing ColdFire cores. However, based on inputs from customers and tool developers, new instructions have been added to enhance code density by up to 6% and improve performance by an additional 10%. Also, the MAC unit has been modified to provide added support for signed, fixed-point fractional numbers, resulting in extended precision while maintaining a low hardware cost.

Time-to-Market Advantage

In today's environment of shrinking development cycles, providing solutions which are easy to use and implement is of paramount importance. By leveraging the 68K programming model and instruction set, the ColdFire Family provides a head start to designers familiar with the ubiquitous 68K family. The unique ColdFire debug module also provides an advantage by supporting background debug as well as real-time trace and debug capabilities. Using a standard interface to all ColdFire processors, tools vendors, such as Embedded Support Tools, Inc., can support all standard and custom ColdFire devices using a single debug system. In addition, the ColdFire family is supported by a wide range of compilers, debuggers, and real-time operating systems. Diab Data; Integrated Systems Inc.; Mentor Graphics Company, Microtec Division; Noral Micrologics; and Software Development Systems (SDS) will be supporting the Version 4 core with their leading development tools.

ColdFire Methodology

As with all ColdFire cores, Version 4 is one hundred percent synthesizable and highly configurable. Using this implementation methodology, ColdFire designs are easily ported to new fabrication technologies. In addition, new combinations of cores, compiled memories, peripherals, and custom logic are easily created with fast time-to-market. The first integrated standard microprocessors using V4 are expected to be available in 2Q99, priced in the $20-25 range. For more information on ColdFire microprocessors, please visit:

http://www.motorola.com/ColdFire

Motorola (NYSE:MOT) Semiconductor Products Sector

As the world's #1 producer of embedded processors, Motorola's Semiconductor Products Sector offers multiple DigitalDNA^TM solutions which enable its customers in the consumer, networking and computing, transportation, and wireless communications markets to create new business opportunities. Motorola's semiconductor sales were US$8.0 billion in l997.

In the global marketplace, Motorola also is one of the leading providers of wireless communications, advanced electronic systems, components and services. Major equipment businesses include cellular telephone, two-way radio, paging and data communications, personal communications, automotive, defense and space electronics and computers. Corporate sales in 1997 were US$29.8 billion.

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Motorola and ColdFire are registered trademarks of Motorola, Inc. Any other trade names, trademarks and registered trademarks used herein are the property of their respective owners.