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MIPS Breaks CPU Performance Bottlenecks with New Faster R10000 RISC
Microprocessor

Initial R10000 Begins Shipping; Sets Record-Breaking Performance

MOUNTAIN VIEW, Calif. (January 18, 1996) - MIPS Technologies,
Inc. today announced a 275 MHz version of its powerful 64-bit, highly
scalable R10000 MIPS RISC microprocessor. The new processor,
available late in the year, boasts industry-leading performance
estimated at 12 SPECint95 and 24 SPECfp95. In addition, the initial
version of the 200 MHz R10000 processor, produced by NEC Corporation
and Toshiba Corporation, began moving into production with the highest
integer and floating-point performance of all currently shipping
microprocessors. Preliminary performance ranges up to 9 SPECint95 and
19 SPECfp95 based on future computer system designs and compilers that
are currently being tested.

Extensive testing of existing software binaries on existing computer
systems upgraded with an R10000 microprocessor indicates a marked
increase in application performance. Large integer software, such as
database applications, show a 1.5 to 2.0 performance increase over the
fastest existing MIPS general purpose microprocessor, the 250 MHz
R4400 processor. Floating point-intensive applications that
include single precision, scalar and irregular vector computing,
including graphics rendering, see a 2 to 3 times increase over
R4400-based systems. Even floating point-intensive applications
optimized for the R8000, MIPS' unique supercomputer-on-a-chip, run
up to 1.5 times faster on systems with an R10000 processor. The
performance differential will be even more dramatic on systems
specifically designed to take fuller advantage of the R10000 processor
running recompiled software binaries.

"With the R10000 microprocessor, MIPS has redefined the CPU," said
Ron Bernal, president of MIPS Technologies, Inc. "Rather than create a
showpiece for benchmarks like SPEC, we designed the R10000 processor for
the highest performance of real commercial applications like transaction
processing, data mining, decision support and high-end file and data
serving, in addition to technical applications like modeling, visualization
and a broad range of supercomputing challenges. The R10000 processor sets
a new plateau for microprocessor standards."

The R10000 microprocessor runs both UNIX and Windows NT operating
systems and significantly increases performance of existing software
applications developed for the R8000, R4000 and R3000 family
of processors without modification. Recompiled applications will see a
substantial increase in performance. The R10000 microprocessor is
designed for a broad spectrum of computing needs, spanning from PCs to
workstations and servers to supercomputers. Systems featuring the
R10000 microprocessor have already been announced by NEC Corporation
and Sony Corporation; other computer systems announcements are
expected throughout 1996. The R10000 processor is designed to be
readily accommodated as an upgrade CPU in existing systems as well as
a platform for new, aggressive system designs.

The R10000 processor is optimized for demanding technical applications
as well as database performance. With its aggressive superscalar
ANDES (Architecture with Non-Sequential Dynamic Execution
Scheduling) architecture, the MIPS R10000 microprocessor breaks many
of the bottlenecks that often render conventional processors idle for
more than half their operational time. A highly advanced dynamic
scheduling implementation enables the processor to operate at its
highest efficiency by reordering instructions to suit the availability
of execution unit resources. The instructions can then be executed and
completed out of order and then reordered, or "graduated," back in
their original order, making the processor well-suited for increasing
the performance of non-recompiled software. Non-blocking caches,
important for large database applications, keep the processor active
while waiting for data it may need for a later operation.

The four-way superscalar R10000 microprocessor can fetch four
instructions and issue up to five instructions per cycle. Furthering
its performance, the R10000 processor has five independent fully
pipelined, low-latency execution units. To speed data flow, the
processor supports large register files and features a large on-chip
primary cache with 32 kilobytes for instructions and 32 kilobytes for
data. The R10000 microprocessor also features an on-chip secondary
cache controller for supporting 512 kilobytes to 16 megabytes of
synchronous secondary cache, ensuring the ability to build a wide
range of computer systems. Both the primary and secondary caches are
two-way set associative to improve the data and instruction hit
rate. The innovative MIPS Avalanche bus enables split
transactions--the ability for two or more operations to overlap their
execution at the same time. The Avalanche bus can hold up to eight
outstanding transactions at one time prior to execution.

Insight from MIPS R10000 Semiconductor Partners

NEC Electronics has committed to producing its version of the R10000,
the VR10000, at speeds up to 275 MHz. In addition, the company will
produce an ASIC chipset for the VR10000 that offers systems and PCI
bus support for I/O devices in workstations and Windows NT
servers. "NEC's version of the R10000, the VR10000, launched last
October, has captured the imagination of high-performance systems
builders in Japan and around the world. NEC's strong commitment to
MIPS RISC technology is thus further enhanced," said Dr. Kenji Kani,
vice president, NEC Corporation.

"We continue to be committed to the MIPS RISC architecture, and the
R10000 processor currently represents the high end of our line," said
Jake Buurma, vice president engineering, Systems IC Division, Toshiba
America Electronic Components, Inc. "Its unprecedented performance
meets the needs of our highest end computer system customers, and
provides opportunities for expansion into new and emerging
applications."

About MIPS Technologies, Inc.

MIPS Technologies, Inc. designs and supplies the world's most advanced
RISC microprocessor technology. The company tests, certifies and
licenses its processor technology to its semiconductor partners who
provide processors for the computer system, emerging consumer and
embedded control markets. MIPS microprocessors power systems from a
number of computer industry leaders, including Siemens Nixdorf AG,
Silicon Graphics, Inc., Sony Corporation, Tandem Computers
Incorporated, NEC Technologies, Inc., NeTpower Inc. and Tektronix,
Inc. MIPS RISC architecture components are available from world-class
semiconductor companies, such as Integrated Device Technology, Inc.,
LSI Logic Corporation, NEC Corporation, NKK Corporation, Philips
Semiconductor, Siemens AG and Toshiba Corporation. MIPS Technologies,
Inc. is a wholly owned subsidiary of Silicon Graphics, Inc. and is
headquartered in Mountain View, Calif.

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